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-rw-r--r--src/mainboard/google/puff/variants/ambassador/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/duffy/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/faffy/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/genesis/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/kaisa/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/moonbuggy/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/noibat/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/puff/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/scout/overridetree.cb2
-rw-r--r--src/mainboard/google/puff/variants/wyvern/overridetree.cb2
10 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/google/puff/variants/ambassador/overridetree.cb b/src/mainboard/google/puff/variants/ambassador/overridetree.cb
index 93e1c0461c..8b6a9ae1b1 100644
--- a/src/mainboard/google/puff/variants/ambassador/overridetree.cb
+++ b/src/mainboard/google/puff/variants/ambassador/overridetree.cb
@@ -396,7 +396,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
end # RTL8111H Ethernet NIC
diff --git a/src/mainboard/google/puff/variants/duffy/overridetree.cb b/src/mainboard/google/puff/variants/duffy/overridetree.cb
index 4681e5e489..b1c50a2701 100644
--- a/src/mainboard/google/puff/variants/duffy/overridetree.cb
+++ b/src/mainboard/google/puff/variants/duffy/overridetree.cb
@@ -455,7 +455,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
end # RTL8111H Ethernet NIC
diff --git a/src/mainboard/google/puff/variants/faffy/overridetree.cb b/src/mainboard/google/puff/variants/faffy/overridetree.cb
index 91d7482ae2..83f0c166e8 100644
--- a/src/mainboard/google/puff/variants/faffy/overridetree.cb
+++ b/src/mainboard/google/puff/variants/faffy/overridetree.cb
@@ -429,7 +429,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
end # RTL8111H Ethernet NIC
diff --git a/src/mainboard/google/puff/variants/genesis/overridetree.cb b/src/mainboard/google/puff/variants/genesis/overridetree.cb
index da7648725e..6458f9f3f5 100644
--- a/src/mainboard/google/puff/variants/genesis/overridetree.cb
+++ b/src/mainboard/google/puff/variants/genesis/overridetree.cb
@@ -426,7 +426,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
end
device pci 1c.7 on # PCI Root Port 8 (WLAN)
diff --git a/src/mainboard/google/puff/variants/kaisa/overridetree.cb b/src/mainboard/google/puff/variants/kaisa/overridetree.cb
index 19f0823901..6a2dd7b3af 100644
--- a/src/mainboard/google/puff/variants/kaisa/overridetree.cb
+++ b/src/mainboard/google/puff/variants/kaisa/overridetree.cb
@@ -455,7 +455,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
end # RTL8111H Ethernet NIC
diff --git a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb
index 9c6ea6489e..a89c56dde6 100644
--- a/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb
+++ b/src/mainboard/google/puff/variants/moonbuggy/overridetree.cb
@@ -428,7 +428,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
end
device pci 1c.7 on # PCI Root Port 8 (WLAN)
diff --git a/src/mainboard/google/puff/variants/noibat/overridetree.cb b/src/mainboard/google/puff/variants/noibat/overridetree.cb
index b81c4e489d..91a193977c 100644
--- a/src/mainboard/google/puff/variants/noibat/overridetree.cb
+++ b/src/mainboard/google/puff/variants/noibat/overridetree.cb
@@ -366,7 +366,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
end # RTL8111H Ethernet NIC
diff --git a/src/mainboard/google/puff/variants/puff/overridetree.cb b/src/mainboard/google/puff/variants/puff/overridetree.cb
index 51832021d8..3cd6a01d21 100644
--- a/src/mainboard/google/puff/variants/puff/overridetree.cb
+++ b/src/mainboard/google/puff/variants/puff/overridetree.cb
@@ -390,7 +390,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
end # RTL8111H Ethernet NIC
diff --git a/src/mainboard/google/puff/variants/scout/overridetree.cb b/src/mainboard/google/puff/variants/scout/overridetree.cb
index 4c13e61fa4..5462e9b700 100644
--- a/src/mainboard/google/puff/variants/scout/overridetree.cb
+++ b/src/mainboard/google/puff/variants/scout/overridetree.cb
@@ -406,7 +406,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
end
device pci 1c.7 on # PCI Root Port 8 (WLAN)
diff --git a/src/mainboard/google/puff/variants/wyvern/overridetree.cb b/src/mainboard/google/puff/variants/wyvern/overridetree.cb
index de3704c888..60ba0bcf51 100644
--- a/src/mainboard/google/puff/variants/wyvern/overridetree.cb
+++ b/src/mainboard/google/puff/variants/wyvern/overridetree.cb
@@ -391,7 +391,7 @@ chip soc/intel/cannonlake
register "wake" = "GPE0_DW1_07" # GPP_C7
register "device_index" = "0"
register "enable_aspm_l1_2" = "1"
- device generic 0 on end
+ device pci 00.0 on end
end
register "PcieRpSlotImplemented[6]" = "1"
end # RTL8111H Ethernet NIC