diff options
-rw-r--r-- | src/northbridge/via/cn700/agp.c | 6 | ||||
-rw-r--r-- | src/northbridge/via/cn700/northbridge.c | 10 | ||||
-rw-r--r-- | src/northbridge/via/cn700/northbridge.h | 2 | ||||
-rw-r--r-- | src/northbridge/via/cn700/vga.c | 2 |
4 files changed, 10 insertions, 10 deletions
diff --git a/src/northbridge/via/cn700/agp.c b/src/northbridge/via/cn700/agp.c index 55e5fe30f3..d0355730f5 100644 --- a/src/northbridge/via/cn700/agp.c +++ b/src/northbridge/via/cn700/agp.c @@ -24,7 +24,7 @@ #include "cn700.h" /* This is the main AGP device, and only one used when configured for AGP 2.0 */ -static void agp_init(device_t dev) +static void agp_init(struct device *dev) { u32 reg32; @@ -117,7 +117,7 @@ static const struct pci_driver agp_driver __pci_driver = { * This is the AGP 3.0 "bridge" @Bus 0 Device 1 Func 0. When using AGP 3.0, the * config in this device takes presidence. We configure both just to be safe. */ -static void agp_bridge_init(device_t dev) +static void agp_bridge_init(struct device *dev) { printk(BIOS_DEBUG, "Setting up AGP bridge device\n"); @@ -152,7 +152,7 @@ static void agp_bridge_init(device_t dev) pci_write_config8(dev, 0x45, 0x72); } -static void agp_bridge_read_resources(device_t dev) +static void agp_bridge_read_resources(struct device *dev) { struct resource *resource; diff --git a/src/northbridge/via/cn700/northbridge.c b/src/northbridge/via/cn700/northbridge.c index f745a0e2f0..78bb6f95d1 100644 --- a/src/northbridge/via/cn700/northbridge.c +++ b/src/northbridge/via/cn700/northbridge.c @@ -30,9 +30,9 @@ #include "northbridge.h" #include "cn700.h" -static void memctrl_init(device_t dev) +static void memctrl_init(struct device *dev) { - device_t vlink_dev; + struct device *vlink_dev; u16 reg16; u8 ranks, pagec, paged, pagee, pagef, shadowreg; @@ -93,11 +93,11 @@ static const struct pci_driver memctrl_driver __pci_driver = { .device = PCI_DEVICE_ID_VIA_CN700_MEMCTRL, }; -static void pci_domain_set_resources(device_t dev) +static void pci_domain_set_resources(struct device *dev) { /* The order is important to find the correct RAM size. */ static const u8 ramregs[] = { 0x43, 0x42, 0x41, 0x40 }; - device_t mc_dev; + struct device *mc_dev; u32 pci_tolm; printk(BIOS_SPEW, "Entering cn700 pci_domain_set_resources.\n"); @@ -151,7 +151,7 @@ static struct device_operations pci_domain_ops = { .scan_bus = pci_domain_scan_bus, }; -static void cpu_bus_init(device_t dev) +static void cpu_bus_init(struct device *dev) { initialize_cpus(dev->link_list); } diff --git a/src/northbridge/via/cn700/northbridge.h b/src/northbridge/via/cn700/northbridge.h index 5aaada967a..1780b4d664 100644 --- a/src/northbridge/via/cn700/northbridge.h +++ b/src/northbridge/via/cn700/northbridge.h @@ -17,6 +17,6 @@ #ifndef NORTHBRIDGE_VIA_CN700_H #define NORTHBRIDGE_VIA_CN700_H -extern unsigned int cn700_scan_root_bus(device_t root, unsigned int max); +extern unsigned int cn700_scan_root_bus(struct device *root, unsigned int max); #endif /* NORTHBRIDGE_VIA_CN700_H */ diff --git a/src/northbridge/via/cn700/vga.c b/src/northbridge/via/cn700/vga.c index 4925f2b44e..493159abe6 100644 --- a/src/northbridge/via/cn700/vga.c +++ b/src/northbridge/via/cn700/vga.c @@ -72,7 +72,7 @@ static int via_cn700_int15_handler(void) return res; } -static void vga_init(device_t dev) +static void vga_init(struct device *dev) { u8 reg8; |