diff options
| -rw-r--r-- | src/soc/intel/xeon_sp/Makefile.mk | 1 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/acpi.c | 39 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/iio_ioapic.c | 41 |
3 files changed, 42 insertions, 39 deletions
diff --git a/src/soc/intel/xeon_sp/Makefile.mk b/src/soc/intel/xeon_sp/Makefile.mk index 1f96bb7f3b..f4051eafa8 100644 --- a/src/soc/intel/xeon_sp/Makefile.mk +++ b/src/soc/intel/xeon_sp/Makefile.mk @@ -15,6 +15,7 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_PMC) += pmc.c pmutil.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += uncore_acpi.c acpi.c ramstage-$(CONFIG_SOC_INTEL_HAS_CXL) += uncore_acpi_cxl.c numa.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c +ramstage-$(CONFIG_XEON_SP_HAVE_IIO_IOAPIC) += iio_ioapic.c smm-y += smihandler.c pmutil.c postcar-y += spi.c diff --git a/src/soc/intel/xeon_sp/acpi.c b/src/soc/intel/xeon_sp/acpi.c index 9ee8d6a59b..0d66aec282 100644 --- a/src/soc/intel/xeon_sp/acpi.c +++ b/src/soc/intel/xeon_sp/acpi.c @@ -90,45 +90,6 @@ const acpi_cstate_t *soc_get_cstate_map(size_t *entries) return map; } -#if CONFIG(XEON_SP_HAVE_IIO_IOAPIC) -static uintptr_t xeonsp_ioapic_bases[CONFIG(XEON_SP_HAVE_IIO_IOAPIC) * 8 + 1]; - -size_t soc_get_ioapic_info(const uintptr_t *ioapic_bases[]) -{ - int index = 0; - const IIO_UDS *hob = get_iio_uds(); - - *ioapic_bases = xeonsp_ioapic_bases; - - for (int socket = 0; socket < CONFIG_MAX_SOCKET; socket++) { - if (!soc_cpu_is_enabled(socket)) - continue; - for (int stack = 0; stack < MAX_IIO_STACK; ++stack) { - const STACK_RES *ri = - &hob->PlatformData.IIO_resource[socket].StackRes[stack]; - uint32_t ioapic_base = ri->IoApicBase; - if (ioapic_base == 0 || ioapic_base == 0xFFFFFFFF) - continue; - assert(index < ARRAY_SIZE(xeonsp_ioapic_bases)); - xeonsp_ioapic_bases[index++] = ioapic_base; - if (!CONFIG(XEON_SP_HAVE_IIO_IOAPIC)) - return index; - /* - * Stack 0 has non-PCH IOAPIC and PCH IOAPIC. - * The IIO IOAPIC is placed at 0x1000 from the reported base. - */ - if (socket == 0 && stack == 0) { - ioapic_base += 0x1000; - assert(index < ARRAY_SIZE(xeonsp_ioapic_bases)); - xeonsp_ioapic_bases[index++] = ioapic_base; - } - } - } - - return index; -} -#endif - void iio_domain_set_acpi_name(struct device *dev, const char *prefix) { const union xeon_domain_path dn = { diff --git a/src/soc/intel/xeon_sp/iio_ioapic.c b/src/soc/intel/xeon_sp/iio_ioapic.c new file mode 100644 index 0000000000..3a99477a7f --- /dev/null +++ b/src/soc/intel/xeon_sp/iio_ioapic.c @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <assert.h> +#include <intelblocks/acpi.h> +#include <soc/chip_common.h> +#include <soc/util.h> +#include <stdint.h> +#include <stdlib.h> + +static uintptr_t xeonsp_ioapic_bases[CONFIG_MAX_SOCKET * MAX_IIO_STACK + 1]; + +size_t soc_get_ioapic_info(const uintptr_t *ioapic_bases[]) +{ + int index = 0; + const IIO_UDS *hob = get_iio_uds(); + + *ioapic_bases = xeonsp_ioapic_bases; + + for (int socket = 0; socket < CONFIG_MAX_SOCKET; socket++) { + if (!soc_cpu_is_enabled(socket)) + continue; + for (int stack = 0; stack < MAX_IIO_STACK; ++stack) { + const STACK_RES *ri = + &hob->PlatformData.IIO_resource[socket].StackRes[stack]; + uint32_t ioapic_base = ri->IoApicBase; + if (ioapic_base == 0 || ioapic_base == 0xFFFFFFFF) + continue; + xeonsp_ioapic_bases[index++] = ioapic_base; + /* + * Stack 0 has non-PCH IOAPIC and PCH IOAPIC. + * The IIO IOAPIC is placed at 0x1000 from the reported base. + */ + if (socket == 0 && stack == 0) { + ioapic_base += 0x1000; + xeonsp_ioapic_bases[index++] = ioapic_base; + } + } + } + + return index; +} |