diff options
| -rw-r--r-- | src/mainboard/google/drallion/ramstage.c | 3 | ||||
| -rw-r--r-- | src/mainboard/google/sarien/ramstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/purism/librem_cnl/ramstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/system76/lemp9/ramstage.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/chip.c | 31 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/gpio.h | 2 |
6 files changed, 5 insertions, 37 deletions
diff --git a/src/mainboard/google/drallion/ramstage.c b/src/mainboard/google/drallion/ramstage.c index ceba219ecf..d44c7b19d3 100644 --- a/src/mainboard/google/drallion/ramstage.c +++ b/src/mainboard/google/drallion/ramstage.c @@ -2,7 +2,6 @@ #include <acpi/acpi.h> #include <smbios.h> -#include <soc/gpio.h> #include <soc/ramstage.h> #include <variant/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> @@ -30,7 +29,7 @@ static void mainboard_init(void *chip_info) size_t num_gpios; gpio_table = variant_gpio_table(&num_gpios); - cnl_configure_pads(gpio_table, num_gpios); + gpio_configure_pads(gpio_table, num_gpios); } static void mainboard_enable(struct device *dev) diff --git a/src/mainboard/google/sarien/ramstage.c b/src/mainboard/google/sarien/ramstage.c index de97c686ee..6287628a88 100644 --- a/src/mainboard/google/sarien/ramstage.c +++ b/src/mainboard/google/sarien/ramstage.c @@ -39,7 +39,7 @@ static void mainboard_init(void *chip_info) size_t num_gpios; gpio_table = variant_gpio_table(&num_gpios); - cnl_configure_pads(gpio_table, num_gpios); + gpio_configure_pads(gpio_table, num_gpios); /* Disable unused pads for devices with board ID > 2 */ if (board_id() > 2) diff --git a/src/mainboard/purism/librem_cnl/ramstage.c b/src/mainboard/purism/librem_cnl/ramstage.c index 381d03be13..0d5dd55e72 100644 --- a/src/mainboard/purism/librem_cnl/ramstage.c +++ b/src/mainboard/purism/librem_cnl/ramstage.c @@ -9,5 +9,5 @@ void mainboard_silicon_init_params(FSPS_UPD *supd) * dependencies during hardware initialization. */ size_t num_gpios; const struct pad_config *gpio_table = variant_gpio_table(&num_gpios); - cnl_configure_pads(gpio_table, num_gpios); + gpio_configure_pads(gpio_table, num_gpios); } diff --git a/src/mainboard/system76/lemp9/ramstage.c b/src/mainboard/system76/lemp9/ramstage.c index 35ffd53bc1..aef7f71a0e 100644 --- a/src/mainboard/system76/lemp9/ramstage.c +++ b/src/mainboard/system76/lemp9/ramstage.c @@ -7,5 +7,5 @@ void mainboard_silicon_init_params(FSPS_UPD *supd) { /* Configure pads prior to SiliconInit() in case there's any * dependencies during hardware initialization. */ - cnl_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); } diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index 4f467a1ab7..c651c59826 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -11,7 +11,6 @@ #include <intelblocks/pcie_rp.h> #include <intelblocks/xdci.h> #include <soc/intel/common/vbt.h> -#include <soc/gpio.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> @@ -140,33 +139,6 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* - * TODO(furquan): Get rid of this workaround once FSP is fixed. Currently, FSP-S - * configures GPIOs when it should not and this results in coreboot GPIO - * configuration being overwritten. Until FSP is fixed, maintain the reference - * of GPIO config table from mainboard and use that to re-configure GPIOs after - * FSP-S is done. - */ -void cnl_configure_pads(const struct pad_config *cfg, size_t num_pads) -{ - static const struct pad_config *g_cfg; - static size_t g_num_pads; - - /* - * If cfg and num_pads are passed in from mainboard, maintain a - * reference to the GPIO table. - */ - if ((cfg == NULL) || (num_pads == 0)) { - cfg = g_cfg; - num_pads = g_num_pads; - } else { - g_cfg = cfg; - g_num_pads = num_pads; - } - - gpio_configure_pads(cfg, num_pads); -} - void soc_init_pre_device(void *chip_info) { /* Perform silicon specific init. */ @@ -175,9 +147,6 @@ void soc_init_pre_device(void *chip_info) /* Display FIRMWARE_VERSION_INFO_HOB */ fsp_display_fvi_version_hob(); - /* TODO(furquan): Get rid of this workaround once FSP is fixed. */ - cnl_configure_pads(NULL, 0); - soc_gpio_pm_configuration(); /* swap enabled PCI ports in device tree if needed */ diff --git a/src/soc/intel/cannonlake/include/soc/gpio.h b/src/soc/intel/cannonlake/include/soc/gpio.h index 9ffa8f1bc2..f204ca2510 100644 --- a/src/soc/intel/cannonlake/include/soc/gpio.h +++ b/src/soc/intel/cannonlake/include/soc/gpio.h @@ -19,7 +19,7 @@ #ifndef __ACPI__ struct pad_config; -void cnl_configure_pads(const struct pad_config *cfg, size_t num_pads); + /* * Routine to perform below operations: * 1. SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register |