diff options
| -rw-r--r-- | src/mainboard/via/epia-m/Options.lb | 4 | ||||
| -rw-r--r-- | src/mainboard/via/epia-m/reset.c | 43 | ||||
| -rw-r--r-- | src/mainboard/via/epia/Options.lb | 7 | ||||
| -rw-r--r-- | src/mainboard/via/epia/reset.c | 43 | ||||
| -rw-r--r-- | targets/via/epia/Config.lb | 5 |
5 files changed, 14 insertions, 88 deletions
diff --git a/src/mainboard/via/epia-m/Options.lb b/src/mainboard/via/epia-m/Options.lb index 89cdc470b8..50d57979e3 100644 --- a/src/mainboard/via/epia-m/Options.lb +++ b/src/mainboard/via/epia-m/Options.lb @@ -38,6 +38,7 @@ uses DEFAULT_CONSOLE_LOGLEVEL uses MAXIMUM_CONSOLE_LOGLEVEL uses CONFIG_CONSOLE_SERIAL8250 uses CONFIG_UDELAY_TSC +uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses CONFIG_PCI_ROM_RUN uses CONFIG_CONSOLE_VGA uses CONFIG_MAX_PCI_BUSES @@ -66,11 +67,12 @@ default HAVE_MP_TABLE=0 ## Use TSC for udelay. ## default CONFIG_UDELAY_TSC=1 +default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 ## ## Build code to reset the motherboard from linuxBIOS ## -default HAVE_HARD_RESET=1 +default HAVE_HARD_RESET=0 ## ## Build code to export a programmable irq routing table diff --git a/src/mainboard/via/epia-m/reset.c b/src/mainboard/via/epia-m/reset.c deleted file mode 100644 index 5796e17dc8..0000000000 --- a/src/mainboard/via/epia-m/reset.c +++ /dev/null @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif diff --git a/src/mainboard/via/epia/Options.lb b/src/mainboard/via/epia/Options.lb index 9377b63dbd..c6be330495 100644 --- a/src/mainboard/via/epia/Options.lb +++ b/src/mainboard/via/epia/Options.lb @@ -11,6 +11,8 @@ uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT uses HAVE_HARD_RESET uses CONFIG_UDELAY_IO +uses CONFIG_UDELAY_TSC +uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 uses HAVE_OPTION_TABLE uses USE_OPTION_TABLE uses CONFIG_ROM_PAYLOAD @@ -81,12 +83,15 @@ default HAVE_MP_TABLE=0 ## ## Build code to reset the motherboard from linuxBIOS ## -default HAVE_HARD_RESET=1 +default HAVE_HARD_RESET=0 ## ## use io based udelay function +## disable IO and enable TSC on Nehemiah boards ## default CONFIG_UDELAY_IO=1 +default CONFIG_UDELAY_TSC=0 +default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0 ## ## Build code to export a programmable irq routing table diff --git a/src/mainboard/via/epia/reset.c b/src/mainboard/via/epia/reset.c deleted file mode 100644 index 5796e17dc8..0000000000 --- a/src/mainboard/via/epia/reset.c +++ /dev/null @@ -1,43 +0,0 @@ -#if 0 -//#include "arch/romcc_io.h" -#include <arch/io.h> - -typedef unsigned device_t; - -#define PCI_DEV(BUS, DEV, FN) ( \ - (((BUS) & 0xFF) << 16) | \ - (((DEV) & 0x1f) << 11) | \ - (((FN) & 0x7) << 8)) - -static void pci_write_config8(device_t dev, unsigned where, unsigned char value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outb(value, 0xCFC + (addr & 3)); -} - -static void pci_write_config32(device_t dev, unsigned where, unsigned value) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - outl(value, 0xCFC); -} - -static unsigned pci_read_config32(device_t dev, unsigned where) -{ - unsigned addr; - addr = dev | where; - outl(0x80000000 | (addr & ~3), 0xCF8); - return inl(0xCFC); -} - -#include "../../../northbridge/amd/amdk8/reset_test.c" - -void hard_reset(void) -{ - set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); -} -#endif diff --git a/targets/via/epia/Config.lb b/targets/via/epia/Config.lb index e45fcf33d0..39f1a6b377 100644 --- a/targets/via/epia/Config.lb +++ b/targets/via/epia/Config.lb @@ -1,6 +1,11 @@ # Sample config file for EPIA # This will make a target directory of ./epia +## uncomment these three lines if you have a Nehemiah CPU to boot 1s faster +#option CONFIG_UDELAY_IO=0 +#option CONFIG_UDELAY_TSC=1 +#option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 + target epia mainboard via/epia option MAXIMUM_CONSOLE_LOGLEVEL=9 |