diff options
| -rw-r--r-- | src/mainboard/google/zork/romstage.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/fsp_m_params.c | 116 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/fsp.h (renamed from src/soc/amd/picasso/include/soc/romstage.h) | 6 | ||||
| -rw-r--r-- | src/soc/amd/picasso/romstage.c | 116 |
5 files changed, 123 insertions, 118 deletions
diff --git a/src/mainboard/google/zork/romstage.c b/src/mainboard/google/zork/romstage.c index 9ad167768f..f72789a3e0 100644 --- a/src/mainboard/google/zork/romstage.c +++ b/src/mainboard/google/zork/romstage.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <baseboard/variants.h> -#include <soc/romstage.h> +#include <soc/fsp.h> void __weak variant_updm_update(FSP_M_CONFIG *mcfg) {} diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 899a070423..b5a2934922 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -19,6 +19,7 @@ bootblock-y += uart.c bootblock-y += gpio.c bootblock-y += reset.c +romstage-y += fsp_m_params.c romstage-y += i2c.c romstage-y += romstage.c romstage-y += gpio.c diff --git a/src/soc/amd/picasso/fsp_m_params.c b/src/soc/amd/picasso/fsp_m_params.c new file mode 100644 index 0000000000..fea16cd137 --- /dev/null +++ b/src/soc/amd/picasso/fsp_m_params.c @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/apob_cache.h> +#include <commonlib/helpers.h> +#include <console/uart.h> +#include <device/device.h> +#include <fsp/api.h> +#include <soc/pci_devs.h> +#include <soc/fsp.h> +#include <types.h> +#include "chip.h" + +void __weak mainboard_updm_update(FSP_M_CONFIG *mupd) {} + +static const struct device_path hda_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = PCIE_GPP_A_DEVFN + }, + { + .type = DEVICE_PATH_PCI, + .pci.devfn = HD_AUDIO_DEVFN + }, +}; + +static bool devtree_hda_dev_enabled(void) +{ + const struct device *hda_dev; + + hda_dev = find_dev_nested_path(pci_root_bus(), hda_path, ARRAY_SIZE(hda_path)); + + if (!hda_dev) + return false; + + return hda_dev->enabled; +} + + +static const struct device_path sata_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = PCIE_GPP_B_DEVFN + }, + { + .type = DEVICE_PATH_PCI, + .pci.devfn = SATA_DEVFN + }, +}; + +static bool devtree_sata_dev_enabled(void) +{ + const struct device *ahci_dev; + + ahci_dev = find_dev_nested_path(pci_root_bus(), sata_path, ARRAY_SIZE(sata_path)); + + if (!ahci_dev) + return false; + + return ahci_dev->enabled; +} + +void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) +{ + FSP_M_CONFIG *mcfg = &mupd->FspmConfig; + const struct soc_amd_picasso_config *config = config_of_soc(); + + mupd->FspmArchUpd.NvsBufferPtr = (uintptr_t)soc_fill_apob_cache(); + + mcfg->pci_express_base_addr = CONFIG_MMCONF_BASE_ADDRESS; + mcfg->tseg_size = CONFIG_SMM_TSEG_SIZE; + mcfg->bert_size = CONFIG_ACPI_BERT_SIZE; + mcfg->serial_port_base = uart_platform_base(CONFIG_UART_FOR_CONSOLE); + mcfg->serial_port_use_mmio = CONFIG(DRIVERS_UART_8250MEM); + mcfg->serial_port_stride = CONFIG(DRIVERS_UART_8250MEM_32) ? 4 : 1; + mcfg->serial_port_baudrate = get_uart_baudrate(); + mcfg->serial_port_refclk = uart_platform_refclk(); + + mcfg->system_config = config->system_config; + + if ((config->slow_ppt_limit_mW) && + (config->fast_ppt_limit_mW) && + (config->slow_ppt_time_constant_s) && + (config->stapm_time_constant_s)) { + mcfg->slow_ppt_limit_mW = config->slow_ppt_limit_mW; + mcfg->fast_ppt_limit_mW = config->fast_ppt_limit_mW; + mcfg->slow_ppt_time_constant_s = config->slow_ppt_time_constant_s; + mcfg->stapm_time_constant_s = config->stapm_time_constant_s; + } + + mcfg->ccx_down_core_mode = config->downcore_mode; + mcfg->ccx_disable_smt = config->smt_disable; + + mcfg->sustained_power_limit_mW = config->sustained_power_limit_mW; + mcfg->prochot_l_deassertion_ramp_time_ms = config->prochot_l_deassertion_ramp_time_ms; + mcfg->thermctl_limit_degreeC = config->thermctl_limit_degreeC; + mcfg->psi0_current_limit_mA = config->psi0_current_limit_mA; + mcfg->psi0_soc_current_limit_mA = config->psi0_soc_current_limit_mA; + mcfg->vddcr_soc_voltage_margin_mV = config->vddcr_soc_voltage_margin_mV; + mcfg->vddcr_vdd_voltage_margin_mV = config->vddcr_vdd_voltage_margin_mV; + mcfg->vrm_maximum_current_limit_mA = config->vrm_maximum_current_limit_mA; + mcfg->vrm_soc_maximum_current_limit_mA = config->vrm_soc_maximum_current_limit_mA; + mcfg->vrm_current_limit_mA = config->vrm_current_limit_mA; + mcfg->vrm_soc_current_limit_mA = config->vrm_soc_current_limit_mA; + mcfg->sb_tsi_alert_comparator_mode_en = config->sb_tsi_alert_comparator_mode_en; + mcfg->core_dldo_bypass = config->core_dldo_bypass; + mcfg->min_soc_vid_offset = config->min_soc_vid_offset; + mcfg->aclk_dpm0_freq_400MHz = config->aclk_dpm0_freq_400MHz; + mcfg->telemetry_vddcr_vdd_slope_mA = config->telemetry_vddcr_vdd_slope_mA; + mcfg->telemetry_vddcr_vdd_offset = config->telemetry_vddcr_vdd_offset; + mcfg->telemetry_vddcr_soc_slope_mA = config->telemetry_vddcr_soc_slope_mA; + mcfg->telemetry_vddcr_soc_offset = config->telemetry_vddcr_soc_offset; + mcfg->hd_audio_enable = devtree_hda_dev_enabled(); + mcfg->sata_enable = devtree_sata_dev_enabled(); + + mainboard_updm_update(mcfg); +} diff --git a/src/soc/amd/picasso/include/soc/romstage.h b/src/soc/amd/picasso/include/soc/fsp.h index 0af374f437..4d79b94232 100644 --- a/src/soc/amd/picasso/include/soc/romstage.h +++ b/src/soc/amd/picasso/include/soc/fsp.h @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef _SOC_ROMSTAGE_H_ -#define _SOC_ROMSTAGE_H_ +#ifndef AMD_PICASSO_SOC_FSP_H +#define AMD_PICASSO_SOC_FSP_H #include <fsp/api.h> void mainboard_updm_update(FSP_M_CONFIG *mcfg); -#endif /* _SOC_ROMSTAGE_H_ */ +#endif /* AMD_PICASSO_SOC_FSP_H */ diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index daf2280346..3e75ebef01 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -1,27 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> #include <acpi/acpi.h> #include <amdblocks/acpi.h> #include <amdblocks/apob_cache.h> #include <amdblocks/memmap.h> +#include <arch/cpu.h> #include <cbmem.h> -#include <cpu/x86/cache.h> -#include <cpu/amd/mtrr.h> -#include <console/uart.h> #include <commonlib/helpers.h> #include <console/console.h> -#include <device/device.h> +#include <fsp/api.h> #include <program_loading.h> -#include <elog.h> #include <soc/acpi.h> -#include <soc/pci_devs.h> -#include <soc/romstage.h> #include <types.h> -#include "chip.h" -#include <fsp/api.h> -void __weak mainboard_updm_update(FSP_M_CONFIG *mupd) {} static struct chipset_power_state chipset_state; static void fill_chipset_state(void) @@ -42,109 +33,6 @@ static void add_chipset_state_cbmem(int unused) ROMSTAGE_CBMEM_INIT_HOOK(add_chipset_state_cbmem); -static const struct device_path hda_path[] = { - { - .type = DEVICE_PATH_PCI, - .pci.devfn = PCIE_GPP_A_DEVFN - }, - { - .type = DEVICE_PATH_PCI, - .pci.devfn = HD_AUDIO_DEVFN - }, -}; - -static bool devtree_hda_dev_enabled(void) -{ - const struct device *hda_dev; - - hda_dev = find_dev_nested_path(pci_root_bus(), hda_path, ARRAY_SIZE(hda_path)); - - if (!hda_dev) - return false; - - return hda_dev->enabled; -} - - -static const struct device_path sata_path[] = { - { - .type = DEVICE_PATH_PCI, - .pci.devfn = PCIE_GPP_B_DEVFN - }, - { - .type = DEVICE_PATH_PCI, - .pci.devfn = SATA_DEVFN - }, -}; - -static bool devtree_sata_dev_enabled(void) -{ - const struct device *ahci_dev; - - ahci_dev = find_dev_nested_path(pci_root_bus(), sata_path, ARRAY_SIZE(sata_path)); - - if (!ahci_dev) - return false; - - return ahci_dev->enabled; -} - -void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) -{ - FSP_M_CONFIG *mcfg = &mupd->FspmConfig; - const struct soc_amd_picasso_config *config = config_of_soc(); - - mupd->FspmArchUpd.NvsBufferPtr = (uintptr_t)soc_fill_apob_cache(); - - mcfg->pci_express_base_addr = CONFIG_MMCONF_BASE_ADDRESS; - mcfg->tseg_size = CONFIG_SMM_TSEG_SIZE; - mcfg->bert_size = CONFIG_ACPI_BERT_SIZE; - mcfg->serial_port_base = uart_platform_base(CONFIG_UART_FOR_CONSOLE); - mcfg->serial_port_use_mmio = CONFIG(DRIVERS_UART_8250MEM); - mcfg->serial_port_stride = CONFIG(DRIVERS_UART_8250MEM_32) ? 4 : 1; - mcfg->serial_port_baudrate = get_uart_baudrate(); - mcfg->serial_port_refclk = uart_platform_refclk(); - - mcfg->system_config = config->system_config; - - if ((config->slow_ppt_limit_mW) && - (config->fast_ppt_limit_mW) && - (config->slow_ppt_time_constant_s) && - (config->stapm_time_constant_s)) { - mcfg->slow_ppt_limit_mW = config->slow_ppt_limit_mW; - mcfg->fast_ppt_limit_mW = config->fast_ppt_limit_mW; - mcfg->slow_ppt_time_constant_s = config->slow_ppt_time_constant_s; - mcfg->stapm_time_constant_s = config->stapm_time_constant_s; - } - - mcfg->ccx_down_core_mode = config->downcore_mode; - mcfg->ccx_disable_smt = config->smt_disable; - - mcfg->sustained_power_limit_mW = config->sustained_power_limit_mW; - mcfg->prochot_l_deassertion_ramp_time_ms = config->prochot_l_deassertion_ramp_time_ms; - mcfg->thermctl_limit_degreeC = config->thermctl_limit_degreeC; - mcfg->psi0_current_limit_mA = config->psi0_current_limit_mA; - mcfg->psi0_soc_current_limit_mA = config->psi0_soc_current_limit_mA; - mcfg->vddcr_soc_voltage_margin_mV = config->vddcr_soc_voltage_margin_mV; - mcfg->vddcr_vdd_voltage_margin_mV = config->vddcr_vdd_voltage_margin_mV; - mcfg->vrm_maximum_current_limit_mA = config->vrm_maximum_current_limit_mA; - mcfg->vrm_soc_maximum_current_limit_mA = config->vrm_soc_maximum_current_limit_mA; - mcfg->vrm_current_limit_mA = config->vrm_current_limit_mA; - mcfg->vrm_soc_current_limit_mA = config->vrm_soc_current_limit_mA; - mcfg->sb_tsi_alert_comparator_mode_en = config->sb_tsi_alert_comparator_mode_en; - mcfg->core_dldo_bypass = config->core_dldo_bypass; - mcfg->min_soc_vid_offset = config->min_soc_vid_offset; - mcfg->aclk_dpm0_freq_400MHz = config->aclk_dpm0_freq_400MHz; - mcfg->telemetry_vddcr_vdd_slope_mA = config->telemetry_vddcr_vdd_slope_mA; - mcfg->telemetry_vddcr_vdd_offset = config->telemetry_vddcr_vdd_offset; - mcfg->telemetry_vddcr_soc_slope_mA = config->telemetry_vddcr_soc_slope_mA; - mcfg->telemetry_vddcr_soc_offset = config->telemetry_vddcr_soc_offset; - mcfg->hd_audio_enable = devtree_hda_dev_enabled(); - mcfg->sata_enable = devtree_sata_dev_enabled(); - - mainboard_updm_update(mcfg); -} - asmlinkage void car_stage_entry(void) { post_code(0x40); |