diff options
| -rw-r--r-- | src/mainboard/google/kahlee/variants/treeya/audio.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/acpi/sb_fch.asl | 8 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/chip.c | 8 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/i2c.c | 8 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/iomap.h | 8 |
5 files changed, 17 insertions, 17 deletions
diff --git a/src/mainboard/google/kahlee/variants/treeya/audio.c b/src/mainboard/google/kahlee/variants/treeya/audio.c index 1c7a4c483b..ac7f7a2729 100644 --- a/src/mainboard/google/kahlee/variants/treeya/audio.c +++ b/src/mainboard/google/kahlee/variants/treeya/audio.c @@ -23,7 +23,7 @@ void variant_devtree_update(void) printk(BIOS_INFO, "Checking audio codec\n"); return; } - } while (mmio_dev->path.mmio.addr != I2CA_BASE_ADDRESS); + } while (mmio_dev->path.mmio.addr != APU_I2C0_BASE); while ((child = dev_bus_each_child(mmio_dev->link_list, child)) != NULL) { if (child->path.type != DEVICE_PATH_I2C) diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl index b389c66aeb..212a111f41 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl @@ -74,7 +74,7 @@ Device (I2CA) { Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 3 } - Memory32Fixed (ReadWrite, I2CA_BASE_ADDRESS, 0x1000) + Memory32Fixed (ReadWrite, APU_I2C0_BASE, 0x1000) }) Method (_STA, 0x0, NotSerialized) @@ -90,7 +90,7 @@ Device (I2CB) Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 15 } - Memory32Fixed (ReadWrite, I2CB_BASE_ADDRESS, 0x1000) + Memory32Fixed (ReadWrite, APU_I2C1_BASE, 0x1000) }) Method (_STA, 0x0, NotSerialized) { @@ -104,7 +104,7 @@ Device (I2CC) { Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 6 } - Memory32Fixed (ReadWrite, I2CC_BASE_ADDRESS, 0x1000) + Memory32Fixed (ReadWrite, APU_I2C2_BASE, 0x1000) }) Method (_STA, 0x0, NotSerialized) @@ -119,7 +119,7 @@ Device (I2CD) Name (_UID, 0x3) Name (_CRS, ResourceTemplate() { IRQ (Edge, ActiveHigh, Exclusive) { 14 } - Memory32Fixed(ReadWrite, I2CD_BASE_ADDRESS, 0x1000) + Memory32Fixed(ReadWrite, APU_I2C3_BASE, 0x1000) }) Method (_STA, 0x0, NotSerialized) { diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index fbf205ece0..5cc52b6926 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -101,10 +101,10 @@ static struct device_operations pci_domain_ops = { static void set_mmio_dev_ops(struct device *dev) { switch (dev->path.mmio.addr) { - case I2CA_BASE_ADDRESS: - case I2CB_BASE_ADDRESS: - case I2CC_BASE_ADDRESS: - case I2CD_BASE_ADDRESS: + case APU_I2C0_BASE: + case APU_I2C1_BASE: + case APU_I2C2_BASE: + case APU_I2C3_BASE: dev->ops = &soc_amd_i2c_mmio_ops; break; } diff --git a/src/soc/amd/stoneyridge/i2c.c b/src/soc/amd/stoneyridge/i2c.c index a098775537..6a6d7760fc 100644 --- a/src/soc/amd/stoneyridge/i2c.c +++ b/src/soc/amd/stoneyridge/i2c.c @@ -7,10 +7,10 @@ #include "chip.h" static const struct soc_i2c_ctrlr_info i2c_ctrlr[] = { - { I2C_MASTER_MODE, I2CA_BASE_ADDRESS, "I2CA" }, - { I2C_MASTER_MODE, I2CB_BASE_ADDRESS, "I2CB" }, - { I2C_MASTER_MODE, I2CC_BASE_ADDRESS, "I2CC" }, - { I2C_MASTER_MODE, I2CD_BASE_ADDRESS, "I2CD" }, + { I2C_MASTER_MODE, APU_I2C0_BASE, "I2CA" }, + { I2C_MASTER_MODE, APU_I2C1_BASE, "I2CB" }, + { I2C_MASTER_MODE, APU_I2C2_BASE, "I2CC" }, + { I2C_MASTER_MODE, APU_I2C3_BASE, "I2CD" }, }; const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs) diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index 3d01938144..93e218df97 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -11,10 +11,10 @@ #define ALINK_AHB_ADDRESS 0xfedc0000 /* I2C fixed address */ -#define I2CA_BASE_ADDRESS 0xfedc2000 -#define I2CB_BASE_ADDRESS 0xfedc3000 -#define I2CC_BASE_ADDRESS 0xfedc4000 -#define I2CD_BASE_ADDRESS 0xfedc5000 +#define APU_I2C0_BASE 0xfedc2000 +#define APU_I2C1_BASE 0xfedc3000 +#define APU_I2C2_BASE 0xfedc4000 +#define APU_I2C3_BASE 0xfedc5000 #if CONFIG(HPET_ADDRESS_OVERRIDE) #error HPET address override is not allowed and must be fixed at 0xfed00000 |