diff options
| -rw-r--r-- | src/mainboard/msi/ms7d25/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/msi/ms7e06/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/chip.h | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb index d22cd92a18..73d871d346 100644 --- a/src/mainboard/msi/ms7d25/devicetree.cb +++ b/src/mainboard/msi/ms7d25/devicetree.cb @@ -83,7 +83,7 @@ chip soc/intel/alderlake }" register "hybrid_storage_mode" = "true" - register "dmi_power_optimize_disable" = "1" + register "dmi_power_optimize_disable" = "true" # FIVR configuration register "fivr_rfi_frequency" = "1394" diff --git a/src/mainboard/msi/ms7e06/devicetree.cb b/src/mainboard/msi/ms7e06/devicetree.cb index 298e9b01fe..eb179885c1 100644 --- a/src/mainboard/msi/ms7e06/devicetree.cb +++ b/src/mainboard/msi/ms7e06/devicetree.cb @@ -13,7 +13,7 @@ chip soc/intel/alderlake register "pmc_gpe0_dw2" = "GPD" register "hybrid_storage_mode" = "true" - register "dmi_power_optimize_disable" = "1" + register "dmi_power_optimize_disable" = "true" # FIVR configuration register "fivr_rfi_frequency" = "1394" diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 67d83b4639..c3034ca2a3 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -584,8 +584,8 @@ struct soc_intel_alderlake_config { uint8_t cpu_ratio_override; /* - * Enable(0)/Disable(1) DMI Power Optimizer on PCH side. - * Default 0. Setting this to 1 disables the DMI Power Optimizer. + * Enable/Disable DMI Power Optimizer on PCH side. + * Default is "false". */ bool dmi_power_optimize_disable; |