diff options
| -rw-r--r-- | src/drivers/intel/fsp2_0/cbmem.c | 9 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/hob_verify.c | 9 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 15 |
3 files changed, 31 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp2_0/cbmem.c b/src/drivers/intel/fsp2_0/cbmem.c index 0efb462b40..5388b8912a 100644 --- a/src/drivers/intel/fsp2_0/cbmem.c +++ b/src/drivers/intel/fsp2_0/cbmem.c @@ -6,7 +6,14 @@ void *cbmem_top_chipset(void) { struct range_entry tolum; + uint8_t *tolum_base; fsp_find_bootloader_tolum(&tolum); - return (void *)(uintptr_t)range_entry_end(&tolum); + tolum_base = (uint8_t *)(uintptr_t)range_entry_base(&tolum); + + /* + * The TOLUM range may have other memory regions (such as APEI + * BERT region on top of CBMEM (IMD root and IMD small) region. + */ + return tolum_base + cbmem_overhead_size(); } diff --git a/src/drivers/intel/fsp2_0/hob_verify.c b/src/drivers/intel/fsp2_0/hob_verify.c index ec526e850d..9bfb0f15a9 100644 --- a/src/drivers/intel/fsp2_0/hob_verify.c +++ b/src/drivers/intel/fsp2_0/hob_verify.c @@ -43,9 +43,16 @@ void fsp_verify_memory_init_hobs(void) die("Space between FSP reserved region and BIOS TOLUM!\n"); } - if (range_entry_end(&tolum) != (uintptr_t)cbmem_top()) { + if (!CONFIG(ACPI_BERT) && range_entry_end(&tolum) != (uintptr_t)cbmem_top()) { printk(BIOS_CRIT, "TOLUM end: 0x%08llx != %p: cbmem_top\n", range_entry_end(&tolum), cbmem_top()); die("Space between cbmem_top and BIOS TOLUM!\n"); } + + if (CONFIG(ACPI_BERT) && + range_entry_end(&tolum) != (uintptr_t)cbmem_top() + CONFIG_ACPI_BERT_SIZE) { + printk(BIOS_CRIT, "TOLUM end: 0x%08llx != %p: cbmem_top + 0x%x: BERT\n", + range_entry_end(&tolum), cbmem_top(), CONFIG_ACPI_BERT_SIZE); + die("Space between cbmem_top and APEI BERT!\n"); + } } diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 07c4463e56..1ef9324d40 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -276,6 +276,21 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) /* Reserve enough memory under TOLUD to save CBMEM header */ arch_upd->BootLoaderTolumSize = cbmem_overhead_size(); + /* + * If ACPI APEI BERT region size is defined, reserve memory for it. + * +------------------------+ range_entry_top(tolum) + * | Other reserved regions | + * | APEI BERT region | + * +------------------------+ cbmem_top() + * | CBMEM IMD ROOT | + * | CBMEM IMD SMALL | + * +------------------------+ range_entry_base(tolum), TOLUM + * | CBMEM FSP MEMORY | + * | Other CBMEM regions... | + */ + if (CONFIG(ACPI_BERT)) + arch_upd->BootLoaderTolumSize += CONFIG_ACPI_BERT_SIZE; + /* Fill common settings on behalf of chipset. */ if (fsp_fill_common_arch_params(arch_upd, s3wake, fsp_version, memmap) != CB_SUCCESS) |