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-rw-r--r--src/mainboard/google/brya/variants/constitution/overridetree.cb12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/constitution/overridetree.cb b/src/mainboard/google/brya/variants/constitution/overridetree.cb
index 8ed61c02f3..67684b9891 100644
--- a/src/mainboard/google/brya/variants/constitution/overridetree.cb
+++ b/src/mainboard/google/brya/variants/constitution/overridetree.cb
@@ -5,6 +5,18 @@ chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
+ # SOC Aux orientation override:
+ # This is a bitfield that corresponds to up to 4 TCSS ports.
+ # Bits (0,1) allocated for TCSS Port1 configuration, Bits (2,3)for TCSS Port2, Bits (4,5)for TCSS Port3.
+ # TcssAuxOri = 010100b
+ # Bit0,Bit2,Bit4 set to "1" indicates no retimer on USBC Ports, otherwise is "0"
+ # Bit1,Bit3,Bit5 set to "0" indicates Aux lines are not swapped on the
+ # motherboard to USBC connector
+ register "tcss_aux_ori" = "0x14"
+
+ register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
+ register "typec_aux_bias_pads[2]" = "{.pad_auxp_dc = GPP_A19, .pad_auxn_dc = GPP_A20}"
+
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # HDMI-IN
register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4
register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Disable USB2 Port 5