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-rw-r--r--src/soc/intel/tigerlake/acpi/tcss_dma.asl7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
index dd6d1bb3ac..951d83d2e3 100644
--- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl
+++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl
@@ -96,13 +96,6 @@ Method (D3CE, 0, Serialized)
* TCSS D3 Cold and TBT RTD3 is only available when system power state is in S0.
*/
Name (SD3C, 0)
-Method (_PS0, 0, Serialized)
-{
-}
-
-Method (_PS3, 0, Serialized)
-{
-}
Method (_DSW, 3)
{