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-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 112b610a18..3bc92967a3 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -85,15 +85,6 @@
#define PM_LPC_A20_EN BIT(1)
#define PM_LPC_ENABLE BIT(0)
-#define ACPI_SMI_CMD_CST_CONTROL 0xde
-#define ACPI_SMI_CMD_PST_CONTROL 0xad
-#define ACPI_SMI_CMD_DISABLE 0xbe
-#define ACPI_SMI_CMD_ENABLE 0xef
-#define ACPI_SMI_CMD_S4_REQ 0xc0
-
-#define REV_STONEYRIDGE_A11 0x11
-#define REV_STONEYRIDGE_A12 0x12
-
#define SPIROM_BASE_ADDRESS_REGISTER 0xa0
#define ROUTE_TPM_2_SPI BIT(3)
#define SPI_ABORT_ENABLE BIT(2)