diff options
-rw-r--r-- | src/soc/intel/skylake/chip.c | 5 | ||||
-rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 5 | ||||
-rw-r--r-- | src/soc/intel/skylake/cpu.c | 2 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/fsp11/soc/ramstage.h | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/fsp20/soc/ramstage.h | 1 |
5 files changed, 13 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 060c4ee0a5..744f5491a1 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -33,6 +33,11 @@ void soc_init_pre_device(void *chip_info) intel_silicon_init(); } +void soc_fsp_load(void) +{ + fsp_load(); +} + static void pci_domain_set_resources(device_t dev) { assign_resources(dev->link_list); diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 97a37e8afc..2b50d0c85b 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -40,6 +40,11 @@ void soc_init_pre_device(void *chip_info) fsp_silicon_init(romstage_handoff_is_resume()); } +void soc_fsp_load(void) +{ + fsps_load(romstage_handoff_is_resume()); +} + static void pci_domain_set_resources(device_t dev) { assign_resources(dev->link_list); diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index e9bb29f7a6..d1a684ca60 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -478,7 +478,7 @@ static const struct mp_ops mp_ops = { * that are set prior to ramstage. * Real MTRRs programming are being done after resource allocation. */ - .pre_mp_init = NULL, + .pre_mp_init = soc_fsp_load, .get_cpu_count = get_cpu_count, .get_smm_info = smm_info, .get_microcode_info = get_microcode_info, diff --git a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h index f1a9e535be..a0c8a17bb9 100644 --- a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h +++ b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h @@ -29,6 +29,7 @@ void soc_irq_settings(FSP_SIL_UPD *params); void pch_enable_dev(device_t dev); void soc_init_pre_device(void *chip_info); +void soc_fsp_load(void); const char *soc_acpi_name(struct device *dev); int init_igd_opregion(igd_opregion_t *igd_opregion); extern struct pci_operations soc_pci_ops; diff --git a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h index 136c4f2647..79362fff17 100644 --- a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h +++ b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h @@ -28,6 +28,7 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params); void pch_enable_dev(device_t dev); +void soc_fsp_load(void); void soc_init_pre_device(void *chip_info); void soc_irq_settings(FSP_SIL_UPD *params); const char *soc_acpi_name(struct device *dev); |