diff options
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpc_lib.h | 3 | ||||
-rw-r--r-- | src/soc/intel/common/block/lpc/lpc.c | 10 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/lpc_gen6.c | 24 |
3 files changed, 37 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h index 0c4780b89c..bb28fc35cf 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpc_lib.h +++ b/src/soc/intel/common/block/include/intelblocks/lpc_lib.h @@ -53,6 +53,9 @@ void lpc_open_mmio_window(uintptr_t base, size_t size); /* Init SoC Specific LPC features. Common definition will be weak and each soc will need to define the init. */ void lpc_soc_init(struct device *dev); +/* Create SoC specific SSDT, by default it does nothing so that static +DSDT could be used. */ +void lpc_soc_fill_ssdt(const struct device *dev); /* Fill up LPC IO resource structure inside SoC directory */ void pch_lpc_soc_fill_io_resources(struct device *dev); /* Set LPC BIOS Control BILD bit. */ diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index b05ee590d4..db06db9a06 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -16,6 +16,15 @@ __weak void lpc_soc_init(struct device *dev) /* no-op */ } +/* Create SoC specific SSDT */ +__weak void lpc_soc_fill_ssdt(const struct device *dev) +{ + /* + * no-op + * by default it does nothing so that static DSDT could be used + */ +} + /* Fill up LPC IO resource structure inside SoC directory */ __weak void pch_lpc_soc_fill_io_resources(struct device *dev) { @@ -134,6 +143,7 @@ struct device_operations lpc_ops = { #if CONFIG(HAVE_ACPI_TABLES) .write_acpi_tables = southbridge_write_acpi_tables, .acpi_name = lpc_acpi_name, + .acpi_fill_ssdt = lpc_soc_fill_ssdt, #endif .init = lpc_soc_init, .scan_bus = scan_static_bus, diff --git a/src/soc/intel/xeon_sp/lpc_gen6.c b/src/soc/intel/xeon_sp/lpc_gen6.c index d2aaec1888..d4045a877d 100644 --- a/src/soc/intel/xeon_sp/lpc_gen6.c +++ b/src/soc/intel/xeon_sp/lpc_gen6.c @@ -6,6 +6,30 @@ #include <intelblocks/pcr.h> #include <soc/pcr_ids.h> +#include <acpi/acpigen.h> +#include <acpi/acpigen_pci.h> + +void lpc_soc_fill_ssdt(const struct device *dev) +{ + const char *scope = acpi_device_scope(dev); + const char *name = acpi_device_name(dev); + + if (!scope || !name) { + printk(BIOS_ERR, "%s: Missing ACPI path/scope\n", dev_path(dev)); + return; + } + + /* Device */ + acpigen_write_scope(scope); + acpigen_write_device(name); + + printk(BIOS_DEBUG, "%s.%s: %s\n", scope, name, dev_path(dev)); + acpigen_write_ADR_pci_device(dev); + + acpigen_write_device_end(); /* Device */ + acpigen_write_scope_end(); /* Scope */ +} + void lpc_soc_init(struct device *dev) { printk(BIOS_SPEW, "pch: lpc_init\n"); |