diff options
| -rw-r--r-- | src/mainboard/arima/hdama/auto.c | 10 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 6 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/raminit.c | 15 |
3 files changed, 12 insertions, 19 deletions
diff --git a/src/mainboard/arima/hdama/auto.c b/src/mainboard/arima/hdama/auto.c index c24f442c22..640bc495c1 100644 --- a/src/mainboard/arima/hdama/auto.c +++ b/src/mainboard/arima/hdama/auto.c @@ -399,18 +399,8 @@ static void main(void) #if 0 init_apic_timer(); #endif -#if 1 setup_default_resource_map(); -#endif - -#if 0 - dump_pci_device(PCI_DEV(0, 0x18, 0)); -#endif - setup_coherent_ht_domain(); -#if 1 - disable_probes(); -#endif enumerate_ht_chain(); print_pci_devices(); enable_smbus(); diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 516f0fc6ae..5c11991646 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -526,8 +526,8 @@ static unsigned int generate_row(u8 node, u8 row, u8 maxnodes) u32 ret=DEFAULT; static const unsigned int rows_2p[2][2] = { - { 0x00030101, 0x00010404 }, - { 0x00010404, 0x00030101 } + { 0x00050101, 0x00010404 }, + { 0x00010404, 0x00050101 } }; static const unsigned int rows_4p[4][4] = { @@ -622,9 +622,11 @@ static void setup_remote_node(u8 node, u8 cpus) uint32_t value; uint8_t reg; reg = pci_reg[i]; +#if 0 print_debug("copying reg: "); print_debug_hex8(reg); print_debug("\r\n"); +#endif value = pci_read_config32(NODE_MP(0), reg); pci_write_config32(NODE_MP(7), reg, value); diff --git a/src/northbridge/amd/amdk8/raminit.c b/src/northbridge/amd/amdk8/raminit.c index fac6e1adee..fd5956743f 100644 --- a/src/northbridge/amd/amdk8/raminit.c +++ b/src/northbridge/amd/amdk8/raminit.c @@ -1123,20 +1123,21 @@ static void route_dram_accesses(const struct mem_controller *ctrl, { #warning "FIXME this is hardcoded for one cpu" unsigned node_id; - unsigned link_id; unsigned limit; + unsigned base; node_id = 0; - link_id = 0; /* Route the addresses to node 0 */ limit = (limit_k << 2); limit &= 0xffff0000; limit -= 0x00010000; - pci_write_config32(ctrl->f1, 0x44, limit | (0 << 7) | (link_id << 4) | (node_id << 0)); - pci_write_config32(ctrl->f1, 0x40, (base_k << 2) | (0 << 8) | (1<<1) | (1<<0)); + base = (base_k << 2); + base &= 0xffff0000; + pci_write_config32(ctrl->f1, 0x44, limit | (0 << 8) | (node_id << 0)); + pci_write_config32(ctrl->f1, 0x40, base | (0 << 8) | (1<<1) | (1<<0)); -#if 1 - pci_write_config32(PCI_DEV(0, 0x19, 1), 0x44, limit | (0 << 7) | (link_id << 4) | (node_id << 0)); - pci_write_config32(PCI_DEV(0, 0x19, 1), 0x40, (base_k << 2) | (0 << 8) | (1<<1) | (1<<0)); +#if 0 + pci_write_config32(PCI_DEV(0, 0x19, 1), 0x44, limit | (0 << 8) | (1 << 4) | (node_id << 0)); + pci_write_config32(PCI_DEV(0, 0x19, 1), 0x40, base | (0 << 8) | (1<<1) | (1<<0)); #endif } |