diff options
| -rw-r--r-- | src/mainboard/google/rex/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/google/rex/variants/baseboard/rex/gpio.c | 8 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index 9e02dd82b9..98870de4e6 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -3,6 +3,7 @@ config BOARD_GOOGLE_REX_COMMON select BOARD_ROMSIZE_KB_32768 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES + select INTEL_LPSS_UART_FOR_CONSOLE config BOARD_GOOGLE_BASEBOARD_REX def_bool n diff --git a/src/mainboard/google/rex/variants/baseboard/rex/gpio.c b/src/mainboard/google/rex/variants/baseboard/rex/gpio.c index 8efb7abc7b..70f05c49b1 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/gpio.c +++ b/src/mainboard/google/rex/variants/baseboard/rex/gpio.c @@ -7,11 +7,19 @@ /* Pad configuration in ramstage */ static const struct pad_config gpio_table[] = { /* ToDo: Fill gpio configuration */ + /* H8 : UART0_RXD ==> UART_DBG_TX_SOC_RX */ + PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), + /* H9 : UART0_TXD ==> UART_DBG_RX_SOC_TX */ + PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), }; /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { /* ToDo: Fill early gpio configuration */ + /* H8 : UART0_RXD ==> UART_DBG_TX_SOC_RX */ + PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), + /* H9 : UART0_TXD ==> UART_DBG_RX_SOC_TX */ + PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), }; const struct pad_config *__weak variant_gpio_table(size_t *num) |