diff options
| -rw-r--r-- | src/arch/arm/armv7/cache.c | 10 | ||||
| -rw-r--r-- | src/arch/arm64/armv8/cache.c | 12 |
2 files changed, 22 insertions, 0 deletions
diff --git a/src/arch/arm/armv7/cache.c b/src/arch/arm/armv7/cache.c index 1f762b8f9b..eea514bd4b 100644 --- a/src/arch/arm/armv7/cache.c +++ b/src/arch/arm/armv7/cache.c @@ -34,6 +34,7 @@ #include <stdint.h> #include <arch/cache.h> +#include <program_loading.h> void tlb_invalidate_all(void) { @@ -155,3 +156,12 @@ void cache_sync_instructions(void) dsb(); isb(); } + +/* + * For each segment of a program loaded this function is called + * to invalidate caches for the addresses of the loaded segment + */ +void arch_segment_loaded(uintptr_t start, size_t size, int flags) +{ + cache_sync_instructions(); +} diff --git a/src/arch/arm64/armv8/cache.c b/src/arch/arm64/armv8/cache.c index db9b3882bc..95f2890ff0 100644 --- a/src/arch/arm64/armv8/cache.c +++ b/src/arch/arm64/armv8/cache.c @@ -36,6 +36,7 @@ #include <arch/cache.h> #include <arch/cache_helpers.h> #include <arch/lib_helpers.h> +#include <program_loading.h> void tlb_invalidate_all(void) { @@ -147,3 +148,14 @@ void cache_sync_instructions(void) flush_dcache_all(DCCISW); /* includes trailing DSB (in assembly) */ icache_invalidate_all(); /* includdes leading DSB and trailing ISB. */ } + + +/* + * For each segment of a program loaded this function is called + * to invalidate caches for the addresses of the loaded segment + */ +void arch_segment_loaded(uintptr_t start, size_t size, int flags) +{ + dcache_clean_invalidate_by_mva((void *)start, size); + icache_invalidate_all(); +} |