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-rw-r--r--src/mainboard/google/brya/variants/baseboard/gpio.c6
-rw-r--r--src/mainboard/google/brya/variants/baseboard/include/baseboard/gpio.h4
2 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/gpio.c b/src/mainboard/google/brya/variants/baseboard/gpio.c
index f91dcc8d33..bbc59a79b8 100644
--- a/src/mainboard/google/brya/variants/baseboard/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/gpio.c
@@ -241,7 +241,7 @@ static const struct pad_config gpio_table[] = {
/* F16 : GSXCLK ==> GSPI_PCH_CS_FPMCU_R_L */
PAD_CFG_NF(GPP_F16, NONE, DEEP, NF4),
/* F17 : THC1_SPI2_RST# ==> EC_PCH_INT_ODL */
- PAD_CFG_GPI_APIC(GPP_F17, NONE, PLTRST, LEVEL, INVERT),
+ PAD_CFG_GPI_IRQ_WAKE(GPP_F17, NONE, PLTRST, LEVEL, INVERT),
/* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
/* F19 : SRCCLKREQ6# ==> WWAN_SIM1_DET_OD */
@@ -342,8 +342,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
/* GPD1: ACPRESENT ==> PCH_ACPRESENT */
PAD_CFG_NF(GPD1, NONE, DEEP, NF1),
- /* GPD2: LAN_WAKE# ==> EC_PCH_WAKE_ODL */
- PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
+ /* GPD2: LAN_WAKE# ==> NC */
+ PAD_NC(GPD2, NONE),
/* GPD3: PWRBTN# ==> EC_PCH_PWR_BTN_ODL */
PAD_CFG_NF(GPD3, NONE, DEEP, NF1),
/* GPD4: SLP_S3# ==> SLP_S3_L */
diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/gpio.h
index 6f41718bd1..2024e488b9 100644
--- a/src/mainboard/google/brya/variants/baseboard/include/baseboard/gpio.h
+++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/gpio.h
@@ -8,7 +8,7 @@
/* eSPI virtual wire reporting */
#define EC_SCI_GPI GPE0_ESPI
-/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
-#define GPE_EC_WAKE GPE0_LAN_WAK
+/* EC wake is EC_PCH_INT which is routed to GPP_F17 pin */
+#define GPE_EC_WAKE GPE0_DW2_17
#endif /* __BASEBOARD_GPIO_H__ */