diff options
| -rw-r--r-- | src/mainboard/amd/quartet/auto.c | 4 | ||||
| -rw-r--r-- | src/mainboard/amd/quartet/fakespd.c | 63 |
2 files changed, 67 insertions, 0 deletions
diff --git a/src/mainboard/amd/quartet/auto.c b/src/mainboard/amd/quartet/auto.c index 788969deaa..c9a72e3320 100644 --- a/src/mainboard/amd/quartet/auto.c +++ b/src/mainboard/amd/quartet/auto.c @@ -101,6 +101,7 @@ static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes) } +#if ( FAKE_SPDROM != 1 ) static inline void activate_spd_rom(const struct mem_controller *ctrl) { #define SMBUS_HUB 0x30 @@ -113,6 +114,9 @@ static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device & 0xff, address); } +#else +#include "fakespd.c" +#endif /* no specific code here. this should go away completely */ static void coherent_ht_mainboard(unsigned cpus) diff --git a/src/mainboard/amd/quartet/fakespd.c b/src/mainboard/amd/quartet/fakespd.c new file mode 100644 index 0000000000..4906a8a5b0 --- /dev/null +++ b/src/mainboard/amd/quartet/fakespd.c @@ -0,0 +1,63 @@ + +#define RC0 ((1<<0)<<8) +#define RC1 ((1<<1)<<8) +#define RC2 ((1<<2)<<8) +#define RC3 ((1<<3)<<8) + +#define DIMM0 0xa0 +#define DIMM1 0xa2 +#define DIMM2 0xa4 +#define DIMM3 0xa8 + + +static inline void activate_spd_rom(const struct mem_controller *ctrl) +{ + /* dummy */ +} + + +/* + * This function is dedicated to Daniele Frijia <realcosmo@spd-online.de> + */ + +static int spd_read_byte(unsigned device, unsigned address) +{ + static const unsigned char infinion_512mb_pc2700[0x80] = { + 0x80, 0x08, 0x07, 0x0d, 0x0b, 0x01, 0x48, 0x00, + 0x04, 0x60, 0x70, 0x02, 0x82, 0x04, 0x04, 0x01, + 0x0e, 0x04, 0x0c, 0x01, 0x02, 0x26, 0xc0, 0x75, + 0x70, 0x00, 0x00, 0x48, 0x30, 0x48, 0x2a, 0x80, + 0x75, 0x75, 0x45, 0x45, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x3c, 0x48, 0x30, 0x28, 0x50, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x47, + 0xc1, 0x49, 0x4e, 0x46, 0x49, 0x4e, 0x45, 0x4f, + 0x53, 0x37, 0x32, 0x44, 0x36, 0x34, 0x33, 0x30, + 0x30, 0x47, 0x42, 0x52, 0x36, 0x42, 0x20, 0x20, + 0x20, 0x20, 0x20, 0x02, 0x0a, 0x03, 0x21, 0x0d, + 0x3d, 0x89, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; + + if ( address >= 0x80 ) + return -1; + + /* This code is AMD quartet specific. + * DIMM0 and DIMM1 are defines of the original smbus device + * numbers on the quartet. We read them here to see which + * spd rom we should fake. + * Below construct assumes that the first two dimm sockets + * of each cpu hold a 512MB Infinion PC2700 CL2.5 ECC registered + * ddr ram module. + */ + + device &= 0xff; + if (device==DIMM0 || device==DIMM1) { + return infinion_512mb_pc2700[address]; + } + + return -1; +} + |