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-rw-r--r--src/soc/amd/common/block/spi/Kconfig6
-rw-r--r--src/soc/amd/common/block/spi/fch_spi.c11
2 files changed, 14 insertions, 3 deletions
diff --git a/src/soc/amd/common/block/spi/Kconfig b/src/soc/amd/common/block/spi/Kconfig
index fa24f8308c..eb5412fd29 100644
--- a/src/soc/amd/common/block/spi/Kconfig
+++ b/src/soc/amd/common/block/spi/Kconfig
@@ -8,6 +8,12 @@ config SOC_AMD_COMMON_BLOCK_SPI
config SOC_AMD_COMMON_BLOCK_SPI_DEBUG
bool
+config SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST
+ bool
+ depends on !SOC_AMD_STONEYRIDGE
+ help
+ Select this option to keep the 4 DWORD burst support enabled.
+
config EFS_SPI_READ_MODE
int
range 0 7
diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c
index 0351847756..7ef98392e0 100644
--- a/src/soc/amd/common/block/spi/fch_spi.c
+++ b/src/soc/amd/common/block/spi/fch_spi.c
@@ -15,11 +15,16 @@ static void fch_spi_set_spi100(int norm, int fast, int alt, int tpm)
spi_write16(SPI100_ENABLE, SPI_USE_SPI100);
}
-static void fch_spi_disable_4dw_burst(void)
+static void fch_spi_configure_4dw_burst(void)
{
uint16_t val = spi_read16(SPI100_HOST_PREF_CONFIG);
- spi_write16(SPI100_HOST_PREF_CONFIG, val & ~SPI_RD4DW_EN_HOST);
+ if (CONFIG(SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST))
+ val |= SPI_RD4DW_EN_HOST;
+ else
+ val &= ~SPI_RD4DW_EN_HOST;
+
+ spi_write16(SPI100_HOST_PREF_CONFIG, val);
}
static void fch_spi_set_read_mode(u32 mode)
@@ -61,6 +66,6 @@ void fch_spi_early_init(void)
{
lpc_enable_spi_rom(SPI_ROM_ENABLE);
lpc_enable_spi_prefetch();
- fch_spi_disable_4dw_burst();
+ fch_spi_configure_4dw_burst();
fch_spi_config_modes();
}