diff options
| -rw-r--r-- | src/soc/amd/common/block/data_fabric/data_fabric_helper.c | 16 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/data_fabric.h | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/data_fabric.c | 4 |
3 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c index d65bc8dac6..7bbdc7f921 100644 --- a/src/soc/amd/common/block/data_fabric/data_fabric_helper.c +++ b/src/soc/amd/common/block/data_fabric/data_fabric_helper.c @@ -2,6 +2,7 @@ #include <amdblocks/data_fabric.h> #include <amdblocks/pci_devs.h> +#include <console/console.h> #include <device/pci_ops.h> #include <soc/data_fabric.h> #include <soc/pci_devs.h> @@ -42,6 +43,21 @@ void data_fabric_write32(uint8_t function, uint16_t reg, uint8_t instance_id, ui pci_write_config32(SOC_DF_F4_DEV, DF_FICAD_LO, data); } +void data_fabric_print_mmio_conf(void) +{ + printk(BIOS_SPEW, + "=== Data Fabric MMIO configuration registers ===\n" + "Addresses are shifted to the right by 16 bits.\n" + "idx control base limit\n"); + for (unsigned int i = 0; i < NUM_NB_MMIO_REGS; i++) { + printk(BIOS_SPEW, " %2u %8x %8x %8x\n", + i, + data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)), + data_fabric_broadcast_read32(0, NB_MMIO_BASE(i)), + data_fabric_broadcast_read32(0, NB_MMIO_LIMIT(i))); + } +} + void data_fabric_disable_mmio_reg(unsigned int reg) { data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index 2c0396aeb3..6df778d54c 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h @@ -42,6 +42,7 @@ void data_fabric_broadcast_write32(uint8_t function, uint16_t reg, uint32_t data pci_write_config32(_SOC_DEV(DF_DEV, function), reg, data); } +void data_fabric_print_mmio_conf(void); void data_fabric_disable_mmio_reg(unsigned int reg); int data_fabric_find_unused_mmio_reg(void); diff --git a/src/soc/amd/picasso/data_fabric.c b/src/soc/amd/picasso/data_fabric.c index d07555a437..982b7b243d 100644 --- a/src/soc/amd/picasso/data_fabric.c +++ b/src/soc/amd/picasso/data_fabric.c @@ -39,6 +39,8 @@ void data_fabric_set_mmio_np(void) const uint32_t np_bot = HPET_BASE_ADDRESS >> D18F0_MMIO_SHIFT; const uint32_t np_top = (LOCAL_APIC_ADDR - 1) >> D18F0_MMIO_SHIFT; + data_fabric_print_mmio_conf(); + for (i = 0; i < NUM_NB_MMIO_REGS; i++) { /* Adjust all registers that overlap */ ctrl = data_fabric_broadcast_read32(0, NB_MMIO_CONTROL(i)); @@ -92,6 +94,8 @@ void data_fabric_set_mmio_np(void) data_fabric_broadcast_write32(0, NB_MMIO_CONTROL(reg), (IOMS0_FABRIC_ID << MMIO_DST_FABRIC_ID_SHIFT) | MMIO_NP | MMIO_WE | MMIO_RE); + + data_fabric_print_mmio_conf(); } static const char *data_fabric_acpi_name(const struct device *dev) |