diff options
| -rw-r--r-- | src/mainboard/google/hatch/Kconfig | 3 | ||||
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/gpio.c | 4 |
3 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 6b4e45f91b..711d2e92ba 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -45,6 +45,9 @@ config DIMM_SPD_SIZE config DRIVER_TPM_SPI_BUS default 0x1 +config UART_FOR_CONSOLE + default 0 + config GBB_HWID string depends on CHROMEOS diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 164c842485..0b3f469b77 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -85,7 +85,7 @@ chip soc/intel/cannonlake device pci 1d.2 off end # PCI Express Port 11 device pci 1d.3 off end # PCI Express Port 12 device pci 1d.4 off end # PCI Express Port 13 (x4) - device pci 1e.0 off end # UART #0 + device pci 1e.0 on end # UART #0 device pci 1e.1 off end # UART #1 device pci 1e.2 on chip drivers/spi/acpi diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 489c489252..0ec97f0177 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -29,6 +29,10 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */ PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1), + /* GPP_C11_TP => NC */ + PAD_NC(GPP_C11, DN_20K), + /* GPP_C10_TP => NC */ + PAD_NC(GPP_C10, DN_20K), /* PCH_I2C_TRACKPAD_SDA */ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* PCH_I2C_TRACKPAD_SCL */ |