diff options
25 files changed, 83 insertions, 1064 deletions
diff --git a/src/arch/i386/init/Makefile.inc b/src/arch/i386/init/Makefile.inc deleted file mode 100644 index 98077e88f1..0000000000 --- a/src/arch/i386/init/Makefile.inc +++ /dev/null @@ -1 +0,0 @@ -# If you add something to this file, enable it in src/arch/i386/Makefile.inc first. diff --git a/src/arch/i386/init/bootblock.c b/src/arch/i386/init/bootblock.c deleted file mode 100644 index 86a5c5b136..0000000000 --- a/src/arch/i386/init/bootblock.c +++ /dev/null @@ -1,47 +0,0 @@ -#define __PRE_RAM__ -#if CONFIG_LOGICAL_CPUS && \ - (defined(CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT) || defined(CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT)) -#include <cpu/x86/lapic/boot_cpu.c> -#else -#define boot_cpu(x) 1 -#endif - -#ifdef CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT -#else -static void bootblock_northbridge_init(void) { } -#endif -#ifdef CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#include CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT -#else -static void bootblock_southbridge_init(void) { } -#endif - -static unsigned long findstage(char* target) -{ - unsigned long entry; - asm volatile ( - "mov $1f, %%esp\n\t" - "jmp walkcbfs\n\t" - "1:\n\t" : "=a" (entry) : "S" (target) : "ebx", "ecx", "edi", "esp"); - return entry; -} - -static void call(unsigned long addr, unsigned long bist) -{ - asm volatile ("jmp *%0\n\t" : : "r" (addr), "a" (bist)); -} - -static void main(unsigned long bist) -{ - if (boot_cpu()) { - bootblock_northbridge_init(); - bootblock_southbridge_init(); - } - const char* target1 = "fallback/romstage"; - unsigned long entry; - entry = findstage(target1); - if (entry) call(entry, bist); - asm volatile ("1:\n\thlt\n\tjmp 1b\n\t"); -} - diff --git a/src/arch/i386/init/bootblock_prologue.c b/src/arch/i386/init/bootblock_prologue.c deleted file mode 100644 index f921c3f8d0..0000000000 --- a/src/arch/i386/init/bootblock_prologue.c +++ /dev/null @@ -1,37 +0,0 @@ -/* -*- asm -*- - * $ $ - * - */ - -/* - * Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer - * - * This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * Originally this code was part of ucl the data compression library - * for upx the ``Ultimate Packer of eXecutables''. - * - * - Converted to gas assembly, and refitted to work with etherboot. - * Eric Biederman 20 Aug 2002 - * - Merged the nrv2b decompressor into crt0.base of coreboot - * Eric Biederman 26 Sept 2002 - */ - - -#include <arch/asm.h> -#include <arch/intel.h> -#include <console/loglevel.h> - -/* - * This is the entry code the code in .reset section - * jumps to this address. - * - */ -.section ".rom.data", "a", @progbits -.section ".rom.text", "ax", @progbits - - intel_chip_post_macro(0x01) /* delay for chipsets */ - diff --git a/src/arch/i386/init/car.S b/src/arch/i386/init/car.S deleted file mode 100644 index 107da7b222..0000000000 --- a/src/arch/i386/init/car.S +++ /dev/null @@ -1,363 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2000,2007 Ronald G. Minnich <rminnich@gmail.com> - * Copyright (C) 2005 Eswar Nallusamy, LANL - * Copyright (C) 2005 Tyan - * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan) - * Copyright (C) 2007 coresystems GmbH - * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH) - * Copyright (C) 2008 Carl-Daniel Hailfinger - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* Init code - Switch CPU to protected mode and enable Cache-as-Ram (CAR). */ - -#include <arch/intel.h> - -#define ROM_CODE_SEG 0x08 -#define ROM_DATA_SEG 0x10 - -#define CACHE_RAM_CODE_SEG 0x18 -#define CACHE_RAM_DATA_SEG 0x20 - - /* When we come here we are in protected mode. We expand the stack - * and copy the data segment from ROM to the memory. - * - * After that, we call the chipset bootstrap routine that - * does what is left of the chipset initialization. - * - * NOTE: Aligned to 4 so that we are sure that the prefetch - * cache will be reloaded. - */ - .section .rom.text - .align 4 - .globl protected_stage0 -protected_stage0: - lgdt %cs:gdtptr - ljmp $ROM_CODE_SEG, $__protected_stage0 - -.globl __protected_stage0 -__protected_stage0: - /* Save the BIST result. */ - movl %eax, %ebp - - intel_chip_post_macro(0x01) - - movw $ROM_DATA_SEG, %ax - movw %ax, %ds - movw %ax, %es - movw %ax, %ss - movw %ax, %fs - movw %ax, %gs - - /* Restore the BIST value to %eax. */ - movl %ebp, %eax - -.align 4 - -/* disable HyperThreading is done by eswar - * the other is very similar to the AMD CAR, except remove amd specific msr - */ - -#define CacheSize CONFIG_DCACHE_RAM_SIZE -#define CacheBase CONFIG_DCACHE_RAM_BASE - -#include <cpu/x86/mtrr.h> - - /* Save the BIST result */ - movl %eax, %ebp - -CacheAsRam: - /* Check whether the processor has HT capability */ - movl $01, %eax - cpuid - btl $28, %edx - jnc NotHtProcessor - bswapl %ebx - cmpb $01, %bh - jbe NotHtProcessor - - /* It is a HT processor; Send SIPI to the other logical processor - * within this processor so that the CAR related common system - * registers are programmed accordingly - */ - - /* Use some register that is common to both logical processors - * as semaphore. Refer Appendix B, Vol.3 - */ - - xorl %eax, %eax - xorl %edx, %edx - movl $0x250, %ecx - wrmsr - - /* Figure out the logical AP's APIC ID; the following logic will work - * only for processors with 2 threads. - * - * Refer to Vol 3. Table 7-1 for details about this logic - */ - movl $0xFEE00020, %esi - movl (%esi), %ebx - andl $0xFF000000, %ebx - bswapl %ebx - btl $0, %ebx - jnc LogicalAP0 - andb $0xFE, %bl - jmp SendSIPI -LogicalAP0: - orb $0x01, %bl -SendSIPI: - bswapl %ebx /* ebx - logical AP's APIC ID */ - - /* Fill up the IPI command registers in the Local APIC mapped to - * default address and issue SIPI to the other logical processor - * within this processor die. - */ - -RetrySIPI: - movl %ebx, %eax - movl $0xFEE00310, %esi - movl %eax, (%esi) - - /* SIPI vector - F900:0000 */ - movl $0x000006F9, %eax - movl $0xFEE00300, %esi - movl %eax, (%esi) - - movl $0x30, %ecx -SIPIDelay: - pause - decl %ecx - jnz SIPIDelay - - movl (%esi), %eax - andl $0x00001000, %eax - jnz RetrySIPI - - /* Wait for the Logical AP to complete initialization */ -LogicalAPSIPINotdone: - movl $0x250, %ecx - rdmsr - orl %eax, %eax - jz LogicalAPSIPINotdone - - - -NotHtProcessor: - /* Set the default memory type and enable fixed and variable MTRRs */ - movl $MTRRdefType_MSR, %ecx - xorl %edx, %edx - /* Enable Variable and Fixed MTRRs */ - movl $0x00000c00, %eax - wrmsr - - /* Clear all MTRRs */ - xorl %edx, %edx - movl $fixed_mtrr_msr, %esi - -clear_fixed_var_mtrr: - lodsl (%esi), %eax - testl %eax, %eax - jz clear_fixed_var_mtrr_out - - movl %eax, %ecx - xorl %eax, %eax - wrmsr - - jmp clear_fixed_var_mtrr -clear_fixed_var_mtrr_out: - -/* 0x06 is the WB IO type for a given 4k segment. - * segs is the number of 4k segments in the area of the particular - * register we want to use for CAR. - * reg is the register where the IO type should be stored. - */ -.macro extractmask segs, reg -.if \segs <= 0 - /* The xorl here is superfluous because at the point of first execution - * of this macro, %eax and %edx are cleared. Later invocations of this - * macro will have a monotonically increasing segs parameter. - */ - xorl \reg, \reg -.elseif \segs == 1 - movl $0x06000000, \reg /* WB IO type */ -.elseif \segs == 2 - movl $0x06060000, \reg /* WB IO type */ -.elseif \segs == 3 - movl $0x06060600, \reg /* WB IO type */ -.elseif \segs >= 4 - movl $0x06060606, \reg /* WB IO type */ -.endif -.endm - -/* size is the cache size in bytes we want to use for CAR. - * windowoffset is the 32k-aligned window into CAR size - */ -.macro simplemask carsize, windowoffset -/* DO NOT CHANGE THE FORMATTING of the two lines below! Whitespace is - * interpreted as an argument delimiter by some versions of GNU as. */ - extractmask (((\carsize-\windowoffset)/0x1000)-4), %eax - extractmask (((\carsize-\windowoffset)/0x1000)), %edx -.endm - -#if CacheSize > 0x10000 -#error Invalid CAR size, must be at most 64k. -#endif -#if CacheSize < 0x1000 -#error Invalid CAR size, must be at least 4k. This is a processor limitation. -#endif -#if (CacheSize & (0x1000 - 1)) -#error Invalid CAR size, is not a multiple of 4k. This is a processor limitation. -#endif - -#if CacheSize > 0x8000 - /* enable caching for 32K-64K using fixed mtrr */ - movl $0x268, %ecx /* fix4k_c0000*/ - simplemask CacheSize, 0x8000 - wrmsr -#endif - - /* enable caching for 0-32K using fixed mtrr */ - movl $0x269, %ecx /* fix4k_c8000*/ - simplemask CacheSize, 0 - wrmsr - -#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE) -#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK -#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE -#else -#define REAL_XIP_ROM_BASE CONFIG_XIP_ROM_BASE -#endif - /* enable write base caching so we can do execute in place - * on the flash rom. - */ - movl $0x202, %ecx - xorl %edx, %edx - movl $REAL_XIP_ROM_BASE, %eax - orl $MTRR_TYPE_WRBACK, %eax - wrmsr - - movl $0x203, %ecx - movl $0x0000000f, %edx - movl $(~(CONFIG_XIP_ROM_SIZE - 1) | 0x800), %eax - wrmsr -#endif /* CONFIG_XIP_ROM_SIZE && CONFIG_XIP_ROM_BASE */ - - /* enable cache */ - movl %cr0, %eax - andl $0x9fffffff,%eax - movl %eax, %cr0 - - /* Read the range with lodsl*/ - movl $CacheBase, %esi - cld - movl $(CacheSize>>2), %ecx - rep lodsl - - /* Clear the range */ - movl $CacheBase, %edi - movl $(CacheSize>>2), %ecx - xorl %eax, %eax - rep stosl - - - /* TODO: make this a config variable */ -#if CARTEST - /* check the cache as ram */ - movl $CacheBase, %esi - movl $(CacheSize>>2), %ecx -.xin1: - movl %esi, %eax - movl %eax, (%esi) - decl %ecx - je .xout1 - add $4, %esi - jmp .xin1 -.xout1: - - movl $CacheBase, %esi -// movl $(CacheSize>>2), %ecx - movl $4, %ecx -.xin1x: - movl %esi, %eax - - movl $0x4000, %edx - movb %ah, %al -.testx1: - outb %al, $0x80 - decl %edx - jnz .testx1 - - movl (%esi), %eax - cmpb 0xff, %al - je .xin2 /* dont show */ - - movl $0x4000, %edx -.testx2: - outb %al, $0x80 - decl %edx - jnz .testx2 - -.xin2: decl %ecx - je .xout1x - add $4, %esi - jmp .xin1x -.xout1x: - -#endif - - movl $(CacheBase+CacheSize-4), %eax - movl %eax, %esp - - /* Load a different set of data segments */ - movw $CACHE_RAM_DATA_SEG, %ax - movw %ax, %ds - movw %ax, %es - movw %ax, %ss - -lout: - /* Store zero for the pointer to the global variables. */ - pushl $0 - - /* Restore the BIST result. */ - movl %ebp, %eax - - /* We need to set ebp? No need. */ - movl %esp, %ebp - - /* Third parameter: cpu #: 0 == BSP all other are APs. - * 0 until SMP support is added. - */ - pushl $0 - /* Second parameter: init_detected */ - /* Store zero for the unused init_detected parameter. */ - pushl $0 - /* First parameter: bist */ - pushl %eax - call main - /* We will not go back. */ - -fixed_mtrr_msr: - .long 0x250, 0x258, 0x259 - .long 0x268, 0x269, 0x26A - .long 0x26B, 0x26C, 0x26D - .long 0x26E, 0x26F -var_mtrr_msr: - .long 0x200, 0x201, 0x202, 0x203 - .long 0x204, 0x205, 0x206, 0x207 - .long 0x208, 0x209, 0x20A, 0x20B - .long 0x20C, 0x20D, 0x20E, 0x20F - .long 0x000 /* NULL, end of table */ diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb deleted file mode 100644 index c4206bf007..0000000000 --- a/src/arch/i386/init/crt0.S.lb +++ /dev/null @@ -1,143 +0,0 @@ -/* -*- asm -*- - * $ $ - * - */ - -/* - * Copyright (C) 1996-2002 Markus Franz Xaver Johannes Oberhumer - * - * This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * Originally this code was part of ucl the data compression library - * for upx the ``Ultimate Packer of eXecutables''. - * - * - Converted to gas assembly, and refitted to work with etherboot. - * Eric Biederman 20 Aug 2002 - * - Merged the nrv2b decompressor into crt0.base of coreboot - * Eric Biederman 26 Sept 2002 - */ - - -#include <arch/asm.h> -#include <arch/intel.h> -#include <console/loglevel.h> - -/* - * This is the entry code the code in .reset section - * jumps to this address. - * - */ -.section ".rom.data", "a", @progbits -.section ".rom.text", "ax", @progbits - - intel_chip_post_macro(0x01) /* delay for chipsets */ - -#include "crt0_includes.h" - -#if CONFIG_USE_DCACHE_RAM == 0 -#ifndef CONSOLE_DEBUG_TX_STRING - /* uses: esp, ebx, ax, dx */ -# define __CRT_CONSOLE_TX_STRING(string) \ - mov string, %ebx ; \ - CALLSP(crt_console_tx_string) - -# if defined(CONFIG_TTYS0_BASE) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) -# define CONSOLE_DEBUG_TX_STRING(string) __CRT_CONSOLE_TX_STRING(string) -# else -# define CONSOLE_DEBUG_TX_STRING(string) -# endif -#endif - - /* clear boot_complete flag */ - xorl %ebp, %ebp -__main: - CONSOLE_DEBUG_TX_STRING($str_copying_to_ram) - - /* - * Copy data into RAM and clear the BSS. Since these segments - * isn\'t really that big we just copy/clear using bytes, not - * double words. - */ - intel_chip_post_macro(0x11) /* post 11 */ - - cld /* clear direction flag */ - - /* copy coreboot from it's initial load location to - * the location it is compiled to run at. - * Normally this is copying from FLASH ROM to RAM. - */ - movl %ebp, %esi - /* FIXME: look for a proper place for the stack */ - movl $0x4000000, %esp - movl %esp, %ebp - pushl %esi - pushl $str_coreboot_ram_name - call cbfs_and_run_core - -.Lhlt: - intel_chip_post_macro(0xee) /* post fe */ - hlt - jmp .Lhlt - -#ifdef __CRT_CONSOLE_TX_STRING - /* Uses esp, ebx, ax, dx */ -crt_console_tx_string: - mov (%ebx), %al - inc %ebx - cmp $0, %al - jne 9f - RETSP -9: -/* Base Address */ -#ifndef CONFIG_TTYS0_BASE -#define CONFIG_TTYS0_BASE 0x3f8 -#endif -/* Data */ -#define TTYS0_RBR (CONFIG_TTYS0_BASE+0x00) - -/* Control */ -#define TTYS0_TBR TTYS0_RBR -#define TTYS0_IER (CONFIG_TTYS0_BASE+0x01) -#define TTYS0_IIR (CONFIG_TTYS0_BASE+0x02) -#define TTYS0_FCR TTYS0_IIR -#define TTYS0_LCR (CONFIG_TTYS0_BASE+0x03) -#define TTYS0_MCR (CONFIG_TTYS0_BASE+0x04) -#define TTYS0_DLL TTYS0_RBR -#define TTYS0_DLM TTYS0_IER - -/* Status */ -#define TTYS0_LSR (CONFIG_TTYS0_BASE+0x05) -#define TTYS0_MSR (CONFIG_TTYS0_BASE+0x06) -#define TTYS0_SCR (CONFIG_TTYS0_BASE+0x07) - - mov %al, %ah -10: mov $TTYS0_LSR, %dx - inb %dx, %al - test $0x20, %al - je 10b - mov $TTYS0_TBR, %dx - mov %ah, %al - outb %al, %dx - - jmp crt_console_tx_string -#endif /* __CRT_CONSOLE_TX_STRING */ - -#if defined(CONSOLE_DEBUG_TX_STRING) && (ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG) -.section ".rom.data" -#if CONFIG_COMPRESS -str_copying_to_ram: .string "Uncompressing coreboot to RAM.\r\n" -#else -str_copying_to_ram: .string "Copying coreboot to RAM.\r\n" -#endif -str_pre_main: .string "Jumping to coreboot.\r\n" -.previous - -#endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ - -str_coreboot_ram_name: .ascii CONFIG_CBFS_PREFIX - .string "/coreboot_ram" - -#endif /* CONFIG_USE_DCACHE_RAM */ diff --git a/src/arch/i386/init/entry.S b/src/arch/i386/init/entry.S deleted file mode 100644 index f091c84d1f..0000000000 --- a/src/arch/i386/init/entry.S +++ /dev/null @@ -1,156 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 1999 Ronald G. Minnich - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include <arch/rom_segs.h> - .code16 - .globl _stage0 -_stage0: - cli - - /* Save the BIST result. */ - movl %eax, %ebp; - - /* thanks to kmliu@sis.com.tw for this TLB fix */ - /* IMMEDIATELY invalidate the translation lookaside buffer (TLB) before - * executing any further code. Even though paging is disabled we - * could still get false address translations due to the TLB if we - * didn't invalidate it. - */ - xorl %eax, %eax - movl %eax, %cr3 /* Invalidate TLB. */ - - /* Switch to protected mode. */ - - /* NOTE: With GNU assembler version 2.15.94.0.2.2 (i386-redhat-linux) - * using BFD version 2.15.94.0.2.2 20041220 this works fine without all - * the ld hackery and other things. So leave it as is with this comment. - */ - - data32 lgdt %cs:gdtptr - - movl %cr0, %eax - andl $0x7FFAFFD1, %eax /* PG, AM, WP, NE, TS, EM, MP = 0 */ - orl $0x60000001, %eax /* CD, NW, PE = 1 */ - movl %eax, %cr0 - - /* Restore BIST result. */ - movl %ebp, %eax - - // port80_post(0x23) - /* Now we are in protected mode. Jump to a 32 bit code segment. */ - data32 ljmp $ROM_CODE_SEG, $protected_stage0 - - /* I am leaving this weird jump in here in the event that future gas - * bugs force it to be used. - */ - /* .byte 0x66 */ - .code32 - /* ljmp $ROM_CODE_SEG, $protected_stage0 */ - - /* .code16 */ - .align 4 - .globl gdt16 -gdt16 = . - _stage0 -gdt16x: - .word gdt16xend - gdt16x -1 /* Compute the table limit. */ - .long gdt16x - .word 0 - - /* selgdt 0x08, flat code segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xcf, 0x00 - - /* selgdt 0x10, flat data segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x93, 0xcf, 0x00 -gdt16xend: - - /* From now on we are 32 bit. */ - .code32 - - /* We have two gdts where we could have one. That is ok. - * - * Let's not worry about this -- optimizing gdt is pointless since - * we're only in it for a little bit. - * - * Btw. note the trick below: The GDT points to ITSELF, and the first - * good descriptor is at offset 8. So you word-align the table, and - * then because you chose 8, you get a nice 64-bit aligned GDT entry, - * which is good as this is the size of the entry. - * Just in case you ever wonder why people do this. - */ - .align 4 - .globl gdtptr - .globl gdt_limit -gdt_limit = gdt_end - gdt - 1 /* Compute the table limit. */ - -gdt: -gdtptr: - .word gdt_end - gdt -1 /* Compute the table limit. */ - .long gdt /* We know the offset. */ - .word 0 - - /* selgdt 0x08, flat code segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xcf, 0x00 - - /* selgdt 0x10, flat data segment */ - .word 0xffff, 0x0000 - .byte 0x00, 0x93, 0xcf, 0x00 - - /* selgdt 0x18, flat code segment for CAR */ - .word 0xffff, 0x0000 - .byte 0x00, 0x9b, 0xcf, 0x00 - - /* selgdt 0x20, flat data segment for CAR */ - .word 0xffff, 0x0000 - .byte 0x00, 0x93, 0xcf, 0x00 -gdt_end: - -/* Reset vector. */ - -/* - * RVECTOR: Size of reset vector, default is 0x10. - * RESRVED: Size of vpd code, default is 0xf0. - * BOOTBLK: Size of bootblock code, default is 0x1f00 (8k-256b). - */ - -SEGMENT_SIZE = 0x10000 -RVECTOR = 0x00010 - -/* Due to YET ANOTHER BUG in GNU bintools, you can NOT have a code16 here. - * I think we should leave it this way forever, as the bugs come and - * go -- and come again. - * - * .code16 - * .section ".rom.text" - */ -.section ".reset", "ax" - .globl _resetjump -_resetjump: - /* GNU bintools bugs again. This jumps to stage0 - 2. Sigh. */ - /* jmp _stage0 */ - .byte 0xe9 - .int _stage0 - ( . + 2 ) - - /* Note: The above jump is hand coded to work around bugs in binutils. - * 5 bytes are used for a 3 byte instruction. This works because x86 - * is little endian and allows us to use supported 32 bit relocations - * instead of the weird 16 bit relocations that binutils does not - * handle consistenly between versions because they are used so rarely. - */ diff --git a/src/arch/i386/init/ldscript.ld b/src/arch/i386/init/ldscript.ld deleted file mode 100644 index e56f644034..0000000000 --- a/src/arch/i386/init/ldscript.ld +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -TARGET(binary) -SECTIONS -{ - /DISCARD/ : { - *(.comment) - *(.note.*) - *(.note) - } -} - -SECTIONS { - _ROMTOP = 0xfffffff0; - . = _ROMTOP; - .resetvector . : { - *(.reset) - . = 15 ; - BYTE(0x00); - } -} - diff --git a/src/arch/i386/init/ldscript_apc.lb b/src/arch/i386/init/ldscript_apc.lb deleted file mode 100644 index 2c8cb84e63..0000000000 --- a/src/arch/i386/init/ldscript_apc.lb +++ /dev/null @@ -1,13 +0,0 @@ -INPUT(coreboot_apc.rom) -SECTIONS -{ - .apcrom . : { - _apcrom = .; - coreboot_apc.rom(*) - _eapcrom = .; - } - _iseg_apc = CONFIG_DCACHE_RAM_BASE; - _eiseg_apc = _iseg_apc + SIZEOF(.apcrom); - _liseg_apc = _apcrom; - _eliseg_apc = _eapcrom; -} diff --git a/src/arch/i386/init/ldscript_cbfs.lb b/src/arch/i386/init/ldscript_cbfs.lb deleted file mode 100644 index 37e867db21..0000000000 --- a/src/arch/i386/init/ldscript_cbfs.lb +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Memory map: - * - * CONFIG_RAMBASE - * : data segment - * : bss segment - * : heap - * : stack - * CONFIG_ROMBASE - * : coreboot text - * : readonly text - */ -/* - * Bootstrap code for the STPC Consumer - * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. - * - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - */ -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") -OUTPUT_ARCH(i386) - -/* -ENTRY(_start) -*/ - -TARGET(binary) -SECTIONS -{ - . = CONFIG_ROMBASE; - - /* This section might be better named .setup */ - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.data); - *(.rodata.*); - *(.rom.data.*); - . = ALIGN(16); - _erom = .; - } - - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - - /DISCARD/ : { - *(.comment) - *(.comment.*) - *(.note) - *(.note.*) - } -} diff --git a/src/arch/i386/init/ldscript_failover.lb b/src/arch/i386/init/ldscript_failover.lb deleted file mode 100644 index 099cae9d8a..0000000000 --- a/src/arch/i386/init/ldscript_failover.lb +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Memory map: - * - * CONFIG_RAMBASE - * : data segment - * : bss segment - * : heap - * : stack - * CONFIG_ROMBASE - * : coreboot text - * : readonly text - */ -/* - * Bootstrap code for the STPC Consumer - * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. - * - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - */ -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") -OUTPUT_ARCH(i386) - -/* -ENTRY(_start) -*/ - -TARGET(binary) -SECTIONS -{ - . = CONFIG_ROMBASE; - - /* This section might be better named .setup */ - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.data); - *(.rom.data.*); - *(.rodata.*); - . = ALIGN(16); - _erom = .; - } - - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - } -} diff --git a/src/arch/i386/init/ldscript_fallback_cbfs.lb b/src/arch/i386/init/ldscript_fallback_cbfs.lb deleted file mode 100644 index eb3bf3f0d7..0000000000 --- a/src/arch/i386/init/ldscript_fallback_cbfs.lb +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Memory map: - * - * CONFIG_RAMBASE - * : data segment - * : bss segment - * : heap - * : stack - * CONFIG_ROMBASE - * : coreboot text - * : readonly text - */ -/* - * Bootstrap code for the STPC Consumer - * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. - * - */ - -/* - * Written by Johan Rydberg, based on work by Daniel Kahlin. - * Rewritten by Eric Biederman - */ -/* - * We use ELF as output format. So that we can - * debug the code in some form. - */ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") -OUTPUT_ARCH(i386) - -/* -ENTRY(_start) -*/ - -TARGET(binary) -SECTIONS -{ - . = CONFIG_ROMBASE; - - /* cut _start into last 64k*/ - _x = .; - . = (_x < (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE)) ? (CONFIG_ROMBASE - 0x10000 + CONFIG_ROM_IMAGE_SIZE) : _x; - - /* This section might be better named .setup */ - .rom . : { - _rom = .; - *(.rom.text); - *(.rom.data); - *(.init.rodata.*); - *(.init.text); - *(.rodata.*); - *(.rom.data.*); - . = ALIGN(16); - _erom = .; - } - - _lrom = LOADADDR(.rom); - _elrom = LOADADDR(.rom) + SIZEOF(.rom); - - /DISCARD/ : { - *(.comment) - *(.note) - *(.comment.*) - *(.note.*) - } -} diff --git a/util/x86emu/biosemu.c b/util/x86emu/biosemu.c index b847bb0109..7c5e3d766f 100644 --- a/util/x86emu/biosemu.c +++ b/util/x86emu/biosemu.c @@ -90,7 +90,7 @@ static u8 biosemu_inb(u16 port) u8 val; val = inb(port); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (port != 0x40) printk("inb(0x%04x) = 0x%02x\n", port, val); #endif @@ -104,7 +104,7 @@ static u16 biosemu_inw(u16 port) val = inw(port); -#ifdef CONFIG_DEBUG +#ifdef DEBUG printk("inw(0x%04x) = 0x%04x\n", port, val); #endif return val; @@ -116,7 +116,7 @@ static u32 biosemu_inl(u16 port) val = inl(port); -#ifdef CONFIG_DEBUG +#ifdef DEBUG printk("inl(0x%04x) = 0x%08x\n", port, val); #endif return val; @@ -124,7 +124,7 @@ static u32 biosemu_inl(u16 port) static void biosemu_outb(u16 port, u8 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (port != 0x43) printk("outb(0x%02x, 0x%04x)\n", val, port); #endif @@ -133,7 +133,7 @@ static void biosemu_outb(u16 port, u8 val) static void biosemu_outw(u16 port, u16 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG printk("outw(0x%04x, 0x%04x)\n", val, port); #endif outw(val, port); @@ -141,7 +141,7 @@ static void biosemu_outw(u16 port, u16 val) static void biosemu_outl(u16 port, u32 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG printk("outl(0x%08x, 0x%04x)\n", val, port); #endif outl(val, port); @@ -556,7 +556,7 @@ void run_bios(struct device * dev, unsigned long addr) push_word(X86_SS); push_word(X86_SP + 2); -#ifdef CONFIG_DEBUG +#ifdef DEBUG //X86EMU_trace_on(); #endif diff --git a/util/x86emu/include/x86emu/fpu_regs.h b/util/x86emu/include/x86emu/fpu_regs.h index efc13ef2be..56e9a04d75 100644 --- a/util/x86emu/include/x86emu/fpu_regs.h +++ b/util/x86emu/include/x86emu/fpu_regs.h @@ -102,7 +102,7 @@ struct x86_fpu_registers { #endif /* X86_FPU_SUPPORT */ -#ifdef CONFIG_DEBUG +#ifdef DEBUG # define DECODE_PRINTINSTR32(t,mod,rh,rl) \ DECODE_PRINTF(t[(mod<<3)+(rh)]); # define DECODE_PRINTINSTR256(t,mod,rh,rl) \ diff --git a/util/x86emu/include/x86emu/regs.h b/util/x86emu/include/x86emu/regs.h index 4b368e4622..df5c6b2d90 100644 --- a/util/x86emu/include/x86emu/regs.h +++ b/util/x86emu/include/x86emu/regs.h @@ -279,7 +279,7 @@ typedef struct { u32 mode; volatile int intr; /* mask of pending interrupts */ volatile int debug; -#ifdef CONFIG_DEBUG +#ifdef DEBUG int check; u16 saved_ip; u16 saved_cs; diff --git a/util/x86emu/include/x86emu/x86emu.h b/util/x86emu/include/x86emu/x86emu.h index 60acfe763c..22e08a9542 100644 --- a/util/x86emu/include/x86emu/x86emu.h +++ b/util/x86emu/include/x86emu/x86emu.h @@ -47,8 +47,10 @@ #include <console/console.h> #undef printk #define printk(x...) do_printk(BIOS_DEBUG, x) -#if defined(CONFIG_DEBUG) && (CONFIG_DEBUG == 0) -#undef CONFIG_DEBUG +#if defined(CONFIG_YABEL_DEBUG_FLAGS) && (CONFIG_YABEL_DEBUG_FLAGS != 0) +#define DEBUG +#else +#undef DEBUG #endif #ifdef SCITECH @@ -164,7 +166,7 @@ void X86EMU_setMemBase(void *base, size_t size); void X86EMU_exec(void); void X86EMU_halt_sys(void); -#ifdef CONFIG_DEBUG +#ifdef DEBUG #define HALT_SYS() \ printk("halt_sys: in %s\n", __func__); \ X86EMU_halt_sys(); diff --git a/util/x86emu/x86_asm.S b/util/x86emu/x86_asm.S index 5e2518c695..616aa8675f 100644 --- a/util/x86emu/x86_asm.S +++ b/util/x86emu/x86_asm.S @@ -170,7 +170,7 @@ __run_interrupt = RELOCATED(.) 1: .code16 /* 16 bit code from here on... */ - // CONFIG_DEBUG + // DEBUG movb $0xec, %al outb %al, $0x80 diff --git a/util/x86emu/x86emu/debug.c b/util/x86emu/x86emu/debug.c index c884462567..026c03fddd 100644 --- a/util/x86emu/x86emu/debug.c +++ b/util/x86emu/x86emu/debug.c @@ -42,7 +42,7 @@ /*----------------------------- Implementation ----------------------------*/ -#ifdef CONFIG_DEBUG +#ifdef DEBUG static void print_encoded_bytes (u16 s, u16 o); static void print_decoded_instruction (void); @@ -94,7 +94,7 @@ void disassemble_forward (u16 seg, u16 off, int n) * flag associated with the "execution", and we are using a copy * of the register struct. All the major opcodes, once fully * decoded, have the following two steps: TRACE_REGS(r,m); - * SINGLE_STEP(r,m); which disappear if CONFIG_DEBUG is not defined to + * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to * the preprocessor. The TRACE_REGS macro expands to: * * if (debug&DEBUG_DISASSEMBLE) @@ -364,7 +364,7 @@ int parse_line (char *s, int *ps, int *n) #endif } -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ void x86emu_dump_regs (void) { diff --git a/util/x86emu/x86emu/debug.h b/util/x86emu/x86emu/debug.h index 4e95e34c38..f6bab3cf78 100644 --- a/util/x86emu/x86emu/debug.h +++ b/util/x86emu/x86emu/debug.h @@ -40,8 +40,8 @@ #ifndef __X86EMU_DEBUG_H #define __X86EMU_DEBUG_H -//#define CONFIG_DEBUG 0 -//#undef CONFIG_DEBUG +//#define DEBUG 0 +//#undef DEBUG /*---------------------- Macros and type definitions ----------------------*/ /* checks to be enabled for "runtime" */ @@ -51,7 +51,7 @@ #define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */ #define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/ -#ifdef CONFIG_DEBUG +#ifdef DEBUG # define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F) # define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F) # define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F) @@ -63,7 +63,7 @@ # define CHECK_DATA_ACCESS() #endif -#ifdef CONFIG_DEBUG +#ifdef DEBUG # define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F) # define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F) # define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F) @@ -106,7 +106,7 @@ # define DEBUG_DECODE_NOPRINT() 0 #endif -#ifdef CONFIG_DEBUG +#ifdef DEBUG # define DECODE_PRINTF(x) if (DEBUG_DECODE()) \ x86emu_decode_printf(x) @@ -136,7 +136,7 @@ # define SAVE_IP_CS(x,y) #endif -#ifdef CONFIG_DEBUG +#ifdef DEBUG #define TRACE_REGS() \ if (DEBUG_DISASSEMBLE()) { \ x86emu_just_disassemble(); \ @@ -147,7 +147,7 @@ # define TRACE_REGS() #endif -#ifdef CONFIG_DEBUG +#ifdef DEBUG # define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step() #else # define SINGLE_STEP() @@ -157,7 +157,7 @@ TRACE_REGS(); \ SINGLE_STEP() -#ifdef CONFIG_DEBUG +#ifdef DEBUG # define START_OF_INSTR() # define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr(); # define END_OF_INSTR_NO_TRACE() x86emu_end_instr(); @@ -167,7 +167,7 @@ # define END_OF_INSTR_NO_TRACE() #endif -#ifdef CONFIG_DEBUG +#ifdef DEBUG # define CALL_TRACE(u,v,w,x,s) \ if (DEBUG_TRACECALLREGS()) \ x86emu_dump_regs(); \ @@ -189,7 +189,7 @@ # define JMP_TRACE(u,v,w,x,s) #endif -#ifdef CONFIG_DEBUG +#ifdef DEBUG #define DB(x) x #else #define DB(x) diff --git a/util/x86emu/x86emu/decode.c b/util/x86emu/x86emu/decode.c index 0d878b9c5f..2cd62348d7 100644 --- a/util/x86emu/x86emu/decode.c +++ b/util/x86emu/x86emu/decode.c @@ -285,7 +285,7 @@ _INLINE u32 get_data_segment(void) case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS: return M.x86.R_SS; default: -#ifdef CONFIG_DEBUG +#ifdef DEBUG printk("error: should not happen: multiple overrides.\n"); #endif HALT_SYS(); @@ -305,7 +305,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline! u8 fetch_data_byte( uint offset) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access((u16)get_data_segment(), offset); #endif @@ -324,7 +324,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline! u16 fetch_data_word( uint offset) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access((u16)get_data_segment(), offset); #endif @@ -343,7 +343,7 @@ NOTE: Do not inline this function as (*sys_rdX) is already inline! u32 fetch_data_long( uint offset) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access((u16)get_data_segment(), offset); #endif @@ -364,7 +364,7 @@ u8 fetch_data_byte_abs( uint segment, uint offset) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access(segment, offset); #endif @@ -385,7 +385,7 @@ u16 fetch_data_word_abs( uint segment, uint offset) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access(segment, offset); #endif @@ -406,7 +406,7 @@ u32 fetch_data_long_abs( uint segment, uint offset) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access(segment, offset); #endif @@ -428,7 +428,7 @@ void store_data_byte( uint offset, u8 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access((u16)get_data_segment(), offset); #endif @@ -450,7 +450,7 @@ void store_data_word( uint offset, u16 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access((u16)get_data_segment(), offset); #endif @@ -472,7 +472,7 @@ void store_data_long( uint offset, u32 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access((u16)get_data_segment(), offset); #endif @@ -495,7 +495,7 @@ void store_data_byte_abs( uint offset, u8 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access(segment, offset); #endif @@ -518,7 +518,7 @@ void store_data_word_abs( uint offset, u16 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access(segment, offset); #endif @@ -541,7 +541,7 @@ void store_data_long_abs( uint offset, u32 val) { -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (CHECK_DATA_ACCESS()) x86emu_check_data_access(segment, offset); #endif diff --git a/util/x86emu/x86emu/fpu.c b/util/x86emu/x86emu/fpu.c index 86be6e9611..85f55c8854 100644 --- a/util/x86emu/x86emu/fpu.c +++ b/util/x86emu/x86emu/fpu.c @@ -50,7 +50,7 @@ void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } -#ifdef CONFIG_DEBUG +#ifdef DEBUG static char *x86emu_fpu_op_d9_tab[] = { "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ", @@ -89,7 +89,7 @@ static char *x86emu_fpu_op_d9_tab1[] = { "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9", }; -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ /* opcode=0xd9 */ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) @@ -100,7 +100,7 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (mod != 3) { DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl); } else { @@ -294,7 +294,7 @@ void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } -#ifdef CONFIG_DEBUG +#ifdef DEBUG char *x86emu_fpu_op_da_tab[] = { "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", @@ -316,7 +316,7 @@ char *x86emu_fpu_op_da_tab[] = { "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ", }; -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ /* opcode=0xda */ void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1)) @@ -384,7 +384,7 @@ void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } -#ifdef CONFIG_DEBUG +#ifdef DEBUG char *x86emu_fpu_op_db_tab[] = { "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ", @@ -397,7 +397,7 @@ char *x86emu_fpu_op_db_tab[] = { "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ", }; -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ /* opcode=0xdb */ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) @@ -407,7 +407,7 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (mod != 3) { DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl); } else if (rh == 4) { /* === 11 10 0 nnn */ @@ -428,7 +428,7 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) } else { DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl)); } -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ switch (mod) { case 0: destoffset = decode_rm00_address(rl); @@ -504,7 +504,7 @@ void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } -#ifdef CONFIG_DEBUG +#ifdef DEBUG char *x86emu_fpu_op_dc_tab[] = { "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ", "FCOMP\tQWORD PTR ", @@ -524,7 +524,7 @@ char *x86emu_fpu_op_dc_tab[] = { "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t", "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t", }; -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ /* opcode=0xdc */ void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)) @@ -618,7 +618,7 @@ void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } -#ifdef CONFIG_DEBUG +#ifdef DEBUG static char *x86emu_fpu_op_dd_tab[] = { "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ", @@ -634,7 +634,7 @@ static char *x86emu_fpu_op_dd_tab[] = { "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,", }; -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ /* opcode=0xdd */ void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)) @@ -718,7 +718,7 @@ void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } -#ifdef CONFIG_DEBUG +#ifdef DEBUG static char *x86emu_fpu_op_de_tab[] = { @@ -741,7 +741,7 @@ static char *x86emu_fpu_op_de_tab[] = "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t", }; -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ /* opcode=0xde */ void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1)) @@ -837,7 +837,7 @@ void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1)) END_OF_INSTR_NO_TRACE(); } -#ifdef CONFIG_DEBUG +#ifdef DEBUG static char *x86emu_fpu_op_df_tab[] = { /* mod == 00 */ @@ -860,7 +860,7 @@ static char *x86emu_fpu_op_df_tab[] = { "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F," }; -#endif /* CONFIG_DEBUG */ +#endif /* DEBUG */ /* opcode=0xdf */ void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1)) diff --git a/util/x86emu/x86emu/ops.c b/util/x86emu/x86emu/ops.c index 71a155f349..fd7ad32d22 100644 --- a/util/x86emu/x86emu/ops.c +++ b/util/x86emu/x86emu/ops.c @@ -76,7 +76,7 @@ /* constant arrays to do several instructions in just one function */ -#ifdef CONFIG_DEBUG +#ifdef DEBUG static char *x86emu_GenOpName[8] = { "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"}; #endif @@ -157,7 +157,7 @@ static u32 (*opcD1_long_operation[])(u32 s, u8 d) = sar_long, }; -#ifdef CONFIG_DEBUG +#ifdef DEBUG static char *opF6_names[8] = { "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" }; @@ -1285,7 +1285,7 @@ static void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -1361,7 +1361,7 @@ static void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -1471,7 +1471,7 @@ static void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -1545,7 +1545,7 @@ static void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -3127,7 +3127,7 @@ static void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -3202,7 +3202,7 @@ static void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -3679,7 +3679,7 @@ static void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -3750,7 +3750,7 @@ static void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -3852,7 +3852,7 @@ static void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -3925,7 +3925,7 @@ static void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1)) */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -4928,7 +4928,7 @@ static void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1)) /* Yet another special case instruction. */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings @@ -4994,7 +4994,7 @@ static void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1)) /* Yet another special case instruction. */ START_OF_INSTR(); FETCH_DECODE_MODRM(mod, rh, rl); -#ifdef CONFIG_DEBUG +#ifdef DEBUG if (DEBUG_DECODE()) { /* XXX DECODE_PRINTF may be changed to something more general, so that it is important to leave the strings diff --git a/util/x86emu/yabel/biosemu.c b/util/x86emu/yabel/biosemu.c index 096af16688..df202814a4 100644 --- a/util/x86emu/yabel/biosemu.c +++ b/util/x86emu/yabel/biosemu.c @@ -57,7 +57,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad { u8 *rom_image; int i = 0; -#ifdef CONFIG_DEBUG +#ifdef DEBUG debug_flags = 0;//DEBUG_PRINT_INT10 | DEBUG_PNP | DEBUG_INTR | DEBUG_CHECK_VMEM_ACCESS | DEBUG_MEM | DEBUG_IO; // | DEBUG_CHECK_VMEM_ACCESS | DEBUG_MEM | DEBUG_IO; // | DEBUG_TRACE_X86EMU | DEBUG_JMP; @@ -252,7 +252,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad CHECK_DBG(DEBUG_TRACE_X86EMU) { X86EMU_trace_on(); } else { -#ifdef CONFIG_DEBUG +#ifdef DEBUG M.x86.debug |= DEBUG_SAVE_IP_CS_F; M.x86.debug |= DEBUG_DECODE_F; M.x86.debug |= DEBUG_DECODE_NOPRINT_F; @@ -273,7 +273,7 @@ biosemu(u8 *biosmem, u32 biosmem_size, struct device * dev, unsigned long rom_ad * some boot device status in AX (see PNP BIOS Spec Section 3.3 */ DEBUG_PRINTF_CS_IP("Option ROM Exit Status: %04x\n", M.x86.R_AX); -#ifdef CONFIG_DEBUG +#ifdef DEBUG DEBUG_PRINTF("Exit Status Decode:\n"); if (M.x86.R_AX & 0x100) { // bit 8 DEBUG_PRINTF diff --git a/util/x86emu/yabel/debug.h b/util/x86emu/yabel/debug.h index 484a0f7ade..92e78782c3 100644 --- a/util/x86emu/yabel/debug.h +++ b/util/x86emu/yabel/debug.h @@ -69,9 +69,9 @@ static inline void set_ci(void) {}; // set to enable tracing of JMPs in x86emu #define DEBUG_JMP 0x2000 -//#define CONFIG_DEBUG -//#undef CONFIG_DEBUG -#ifdef CONFIG_DEBUG +//#define DEBUG +//#undef DEBUG +#ifdef DEBUG #define CHECK_DBG(_flag) if (debug_flags & _flag) @@ -103,7 +103,7 @@ static inline void set_ci(void) {}; #define DEBUG_PRINTF_DISK(_x...) #define DEBUG_PRINTF_PNP(_x...) -#endif //CONFIG_DEBUG +#endif //DEBUG void dump(u8 * addr, u32 len); diff --git a/util/x86emu/yabel/device.c b/util/x86emu/yabel/device.c index 60bad5c122..929e97779b 100644 --- a/util/x86emu/yabel/device.c +++ b/util/x86emu/yabel/device.c @@ -112,7 +112,7 @@ biosemu_dev_get_addr_info(void) } // store last entry index of translate_address_array taa_last_entry = taa_index - 1; -#ifdef CONFIG_DEBUG +#ifdef DEBUG //dump translate_address_array printf("translate_address_array: \n"); translate_address_t ta; @@ -195,7 +195,7 @@ biosemu_dev_get_addr_info(void) } // store last entry index of translate_address_array taa_last_entry = taa_index - 1; -#ifdef CONFIG_DEBUG +#ifdef DEBUG //dump translate_address_array printf("translate_address_array: \n"); translate_address_t ta; @@ -334,7 +334,7 @@ biosemu_dev_check_exprom(unsigned long rom_base_addr) memcpy(&pci_ds, (void *) (rom_base_addr + pci_ds_offset), sizeof(pci_ds)); clr_ci(); -#ifdef CONFIG_DEBUG +#ifdef DEBUG DEBUG_PRINTF("PCI Data Structure @%lx:\n", rom_base_addr + pci_ds_offset); dump((void *) &pci_ds, sizeof(pci_ds)); diff --git a/util/x86emu/yabel/mem.c b/util/x86emu/yabel/mem.c index 339e59f61e..294e76db1a 100644 --- a/util/x86emu/yabel/mem.c +++ b/util/x86emu/yabel/mem.c @@ -19,7 +19,7 @@ #include "compat/time.h" // define a check for access to certain (virtual) memory regions (interrupt handlers, BIOS Data Area, ...) -#ifdef CONFIG_DEBUG +#ifdef DEBUG static u8 in_check = 0; // to avoid recursion... u16 ebda_segment; u32 ebda_size; |