diff options
| -rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/picasso/fsp_params.c | 55 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/platform_descriptors.h | 16 |
3 files changed, 72 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 4790ecb502..c7b6fb8bc9 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -58,6 +58,7 @@ ramstage-y += tsc_freq.c ramstage-y += finalize.c ramstage-y += soc_util.c ramstage-y += psp.c +ramstage-y += fsp_params.c all-y += reset.c diff --git a/src/soc/amd/picasso/fsp_params.c b/src/soc/amd/picasso/fsp_params.c new file mode 100644 index 0000000000..0dbda093f3 --- /dev/null +++ b/src/soc/amd/picasso/fsp_params.c @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#include <device/pci.h> +#include <soc/pci_devs.h> +#include <soc/platform_descriptors.h> +#include <fsp/api.h> +#include "chip.h" + +static void fill_pcie_descriptors(FSP_S_CONFIG *scfg, + const picasso_fsp_pcie_descriptor *descs, size_t num) +{ + size_t i; + picasso_fsp_pcie_descriptor *fsp_pcie; + + /* FIXME: this violates C rules. */ + fsp_pcie = (picasso_fsp_pcie_descriptor *)(scfg->dxio_descriptor0); + + for (i = 0; i < num; i++) { + fsp_pcie[i] = descs[i]; + } +} + +static void fill_ddi_descriptors(FSP_S_CONFIG *scfg, + const picasso_fsp_ddi_descriptor *descs, size_t num) +{ + size_t i; + picasso_fsp_ddi_descriptor *fsp_ddi; + + /* FIXME: this violates C rules. */ + fsp_ddi = (picasso_fsp_ddi_descriptor *)&(scfg->ddi_descriptor0); + + for (i = 0; i < num; i++) { + fsp_ddi[i] = descs[i]; + } +} +static void fsp_fill_pcie_ddi_descriptors(FSP_S_CONFIG *scfg) +{ + const picasso_fsp_pcie_descriptor *fsp_pcie; + const picasso_fsp_ddi_descriptor *fsp_ddi; + size_t num_pcie; + size_t num_ddi; + + mainboard_get_pcie_ddi_descriptors(&fsp_pcie, &num_pcie, + &fsp_ddi, &num_ddi); + fill_pcie_descriptors(scfg, fsp_pcie, num_pcie); + fill_ddi_descriptors(scfg, fsp_ddi, num_ddi); +} + +void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) +{ + FSP_S_CONFIG *scfg = &supd->FspsConfig; + + fsp_fill_pcie_ddi_descriptors(scfg); +} diff --git a/src/soc/amd/picasso/include/soc/platform_descriptors.h b/src/soc/amd/picasso/include/soc/platform_descriptors.h new file mode 100644 index 0000000000..bc67550fd0 --- /dev/null +++ b/src/soc/amd/picasso/include/soc/platform_descriptors.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#ifndef __PICASSO_PLATFORM_DESCRIPTORS_H__ +#define __PICASSO_PLATFORM_DESCRIPTORS_H__ + +#include <types.h> +#include <platform_descriptors.h> +#include <FspsUpd.h> + +/* Mainboard callback to obtain PCIe and DDI descriptors. */ +void mainboard_get_pcie_ddi_descriptors( + const picasso_fsp_pcie_descriptor **pcie_descs, size_t *pcie_num, + const picasso_fsp_ddi_descriptor **ddi_descs, size_t *ddi_num); + +#endif /* __PICASSO_PLATFORM_DESCRIPTORS_H__ */ |