diff options
16 files changed, 28 insertions, 28 deletions
diff --git a/src/mainboard/intel/apollolake_rvp/devicetree.cb b/src/mainboard/intel/apollolake_rvp/devicetree.cb index a983807f4f..bf20913c8a 100644 --- a/src/mainboard/intel/apollolake_rvp/devicetree.cb +++ b/src/mainboard/intel/apollolake_rvp/devicetree.cb @@ -21,8 +21,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" end device pci 13.0 on end # - PCIe-A 0 device pci 13.2 on end # - Onboard Lan diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb index 551fc60d52..294d4680e2 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/glkrvp/variants/baseboard/devicetree.cb @@ -121,8 +121,8 @@ chip soc/intel/apollolake device pci 0f.2 on end # - Heci3 device pci 11.0 off end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" end device pci 13.0 off end # - PCIe-A 0 Slot 1 device pci 13.1 off end # - PCIe-A 1 diff --git a/src/mainboard/intel/leafhill/devicetree.cb b/src/mainboard/intel/leafhill/devicetree.cb index 0a152b6a4a..c1bfb97e1f 100644 --- a/src/mainboard/intel/leafhill/devicetree.cb +++ b/src/mainboard/intel/leafhill/devicetree.cb @@ -21,8 +21,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" end device pci 13.0 on end # - PCIe-A 0 device pci 13.2 on end # - Onboard Lan diff --git a/src/mainboard/intel/minnow3/devicetree.cb b/src/mainboard/intel/minnow3/devicetree.cb index 0a152b6a4a..c1bfb97e1f 100644 --- a/src/mainboard/intel/minnow3/devicetree.cb +++ b/src/mainboard/intel/minnow3/devicetree.cb @@ -21,8 +21,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" end device pci 13.0 on end # - PCIe-A 0 device pci 13.2 on end # - Onboard Lan diff --git a/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb index a2a9df44c2..734f3f3842 100644 --- a/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb +++ b/src/mainboard/kontron/mal10/variants/mal10/devicetree.cb @@ -19,8 +19,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # TXE device pci 11.0 off end # ISH device pci 12.0 on # SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" end device pci 13.0 on # PCIe-A 1 (Root Port 2) register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb index a08f053d8c..5d4acd85ab 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb @@ -69,8 +69,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "DisableSataSalpSupport" = "1" end device pci 13.0 on # - RP 2 - PCIe A 0 - MACPHY diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb index 129149711f..7054413305 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb @@ -67,8 +67,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "sata_ports_ssd[0]" = "1" register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb index 56d93aa30d..472f5baddc 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb @@ -64,8 +64,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "DisableSataSalpSupport" = "1" end device pci 13.0 on # - RP 2 - PCIe A 0 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb index 1c5f7970ef..baaff1e960 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb @@ -58,8 +58,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "DisableSataSalpSupport" = "1" end device pci 13.0 on # - RP 2 - PCIe A 0 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb index b308ab2519..52fcd49df6 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb @@ -67,8 +67,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "sata_ports_ssd[0]" = "1" register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb index 1885e817f0..dc66be63bd 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl6/devicetree.cb @@ -38,8 +38,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - CSE device pci 11.0 on end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" register "sata_ports_ssd[0]" = "1" register "sata_ports_ssd[1]" = "1" register "DisableSataSalpSupport" = "1" diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb index f1ace5a559..fb9070fd34 100644 --- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb @@ -71,7 +71,7 @@ chip soc/intel/apollolake device ref heci2 on end device ref heci3 on end device ref sata on - register "SataPortsEnable[0]" = "1" + register "sata_ports_enable[0]" = "1" end device ref xhci on # Motherboard USB Type C diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb index 71932a6450..b4e627c4ab 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb @@ -71,7 +71,7 @@ chip soc/intel/apollolake device ref heci2 on end device ref heci3 on end device ref sata on - register "SataPortsEnable[0]" = "1" + register "sata_ports_enable[0]" = "1" end device ref xhci on # Motherboard USB Type C diff --git a/src/mainboard/up/squared/devicetree.cb b/src/mainboard/up/squared/devicetree.cb index 4b0d5f79b1..4f5a91cac5 100644 --- a/src/mainboard/up/squared/devicetree.cb +++ b/src/mainboard/up/squared/devicetree.cb @@ -35,8 +35,8 @@ chip soc/intel/apollolake device pci 0f.0 on end # - TXE device pci 11.0 off end # - ISH device pci 12.0 on # - SATA - register "SataPortsEnable[0]" = "1" - register "SataPortsEnable[1]" = "1" + register "sata_ports_enable[0]" = "1" + register "sata_ports_enable[1]" = "1" end device pci 13.0 on end # - PCIe-A 1 - PcieRootPort[2] device pci 13.1 on end # - PCIe-A 2 - PcieRootPort[3] diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 71470111ae..04aa2ebd99 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -737,7 +737,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) if (is_devfn_enabled(PCH_DEVFN_SATA)) { silconfig->SataSalpSupport = !(cfg->DisableSataSalpSupport); silconfig->SpeedLimit = cfg->sata_speed; - memcpy(silconfig->SataPortsEnable, cfg->SataPortsEnable, + memcpy(silconfig->SataPortsEnable, cfg->sata_ports_enable, sizeof(silconfig->SataPortsEnable)); memcpy(silconfig->SataPortsSolidStateDrive, cfg->sata_ports_ssd, sizeof(silconfig->SataPortsSolidStateDrive)); diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 45b60d3c89..b95625234a 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -107,7 +107,7 @@ struct soc_intel_apollolake_config { uint8_t SataPortsHotPlug[2]; /* Sata Ports Enable */ - uint8_t SataPortsEnable[2]; + uint8_t sata_ports_enable[2]; /* Sata Ports Solid State Drive */ uint8_t sata_ports_ssd[2]; |