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-rw-r--r--src/soc/intel/alderlake/chip.h7
-rw-r--r--src/soc/intel/alderlake/romstage/fsp_params.c1
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index f4cab6fe6a..591d8be52f 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -737,6 +737,13 @@ struct soc_intel_alderlake_config {
* Set this to 1 in order to reduce BasicMemoryTest size
*/
bool lower_basic_mem_test_size;
+
+ /*
+ * Enable or Disable SaGV reordering operation.
+ * Default is set to 0, SaGV reordering enabled.
+ * Set this to 1 in order to disable SaGV reordering.
+ */
+ bool disable_sagv_reorder;
};
typedef struct soc_intel_alderlake_config config_t;
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 1326cb5c1a..6b701edd20 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -160,6 +160,7 @@ static void fill_fspm_mrc_params(FSP_M_CONFIG *m_cfg,
}
#if CONFIG(SOC_INTEL_RAPTORLAKE)
m_cfg->LowerBasicMemTestSize = config->lower_basic_mem_test_size;
+ m_cfg->DisableSagvReorder = config->disable_sagv_reorder;
#endif
}