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-rw-r--r--src/northbridge/amd/agesa/family14/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/pi/00630F01/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/pi/00660F01/acpi/northbridge.asl5
-rw-r--r--src/northbridge/amd/pi/00730F01/acpi/northbridge.asl5
-rw-r--r--src/soc/amd/picasso/acpi/northbridge.asl5
-rw-r--r--src/soc/amd/stoneyridge/acpi/northbridge.asl5
8 files changed, 32 insertions, 8 deletions
diff --git a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
index 06199a1b07..6e3bc934b1 100644
--- a/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family14/acpi/northbridge.asl
@@ -18,13 +18,16 @@ External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* The internal GFX bridge */
Device(AGPB) {
Name(_ADR, 0x00010000)
diff --git a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
index 9a1fa9ed88..f679234e14 100644
--- a/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family15tn/acpi/northbridge.asl
@@ -17,7 +17,6 @@
External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
@@ -45,6 +44,10 @@ Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* Dev2 is also an external GFX bridge */
Device(PBR2) {
Name(_ADR, 0x00020000)
diff --git a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
index f74b31a080..3300db0c9c 100644
--- a/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
+++ b/src/northbridge/amd/agesa/family16kb/acpi/northbridge.asl
@@ -18,7 +18,6 @@ External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
@@ -45,6 +44,10 @@ Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* Gpp 0 */
Device(PBR4) {
Name(_ADR, 0x00020001)
diff --git a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
index c2b3aac4c5..f3d42fa4ad 100644
--- a/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00630F01/acpi/northbridge.asl
@@ -17,7 +17,6 @@
External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A03")) /* PCI Express Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
@@ -45,6 +44,10 @@ Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* Dev2 is also an external GFX bridge */
Device(PBR2) {
Name(_ADR, 0x00020000)
diff --git a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
index d54f985e90..761ff44399 100644
--- a/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00660F01/acpi/northbridge.asl
@@ -18,7 +18,6 @@ External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
@@ -45,6 +44,10 @@ Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* Gpp 0 */
Device(PBR4) {
Name(_ADR, 0x00020001)
diff --git a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
index f74b31a080..3300db0c9c 100644
--- a/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
+++ b/src/northbridge/amd/pi/00730F01/acpi/northbridge.asl
@@ -18,7 +18,6 @@ External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
@@ -45,6 +44,10 @@ Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* Gpp 0 */
Device(PBR4) {
Name(_ADR, 0x00020001)
diff --git a/src/soc/amd/picasso/acpi/northbridge.asl b/src/soc/amd/picasso/acpi/northbridge.asl
index fe78534403..b1c2d31bc2 100644
--- a/src/soc/amd/picasso/acpi/northbridge.asl
+++ b/src/soc/amd/picasso/acpi/northbridge.asl
@@ -19,7 +19,6 @@ External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
@@ -46,6 +45,10 @@ Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* Internal Graphics */
Device(IGFX) {
Name(_ADR, 0x00010000)
diff --git a/src/soc/amd/stoneyridge/acpi/northbridge.asl b/src/soc/amd/stoneyridge/acpi/northbridge.asl
index fe78534403..b1c2d31bc2 100644
--- a/src/soc/amd/stoneyridge/acpi/northbridge.asl
+++ b/src/soc/amd/stoneyridge/acpi/northbridge.asl
@@ -19,7 +19,6 @@ External (TOM1)
External (TOM2)
Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
-Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Describe the Northbridge devices */
@@ -46,6 +45,10 @@ Device(AMRT) {
Name(_ADR, 0x00000000)
} /* end AMRT */
+Device(PCSD) { /* Processor configuration space devices */
+ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
+}
+
/* Internal Graphics */
Device(IGFX) {
Name(_ADR, 0x00010000)
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-25 11:36:11 +0000