diff options
-rw-r--r-- | util/intelp2m/config/config.go | 7 | ||||
-rw-r--r-- | util/intelp2m/description.md | 108 | ||||
-rw-r--r-- | util/intelp2m/fields/cb/cb.go | 4 | ||||
-rw-r--r-- | util/intelp2m/main.go | 41 | ||||
-rw-r--r-- | util/intelp2m/parser/parser.go | 16 | ||||
-rw-r--r-- | util/intelp2m/platforms/common/macro.go | 72 |
6 files changed, 110 insertions, 138 deletions
diff --git a/util/intelp2m/config/config.go b/util/intelp2m/config/config.go index 724de8caa6..16fb4d6e01 100644 --- a/util/intelp2m/config/config.go +++ b/util/intelp2m/config/config.go @@ -82,11 +82,12 @@ func IsNonCheckingFlagUsed() bool { return nonCheckingFlag } -var infolevel uint8 = 0 -func InfoLevelSet(lvl uint8) { + +var infolevel int = 0 +func InfoLevelSet(lvl int) { infolevel = lvl } -func InfoLevelGet() uint8 { +func InfoLevelGet() int { return infolevel } diff --git a/util/intelp2m/description.md b/util/intelp2m/description.md index add9c2cf88..9ca56b979e 100644 --- a/util/intelp2m/description.md +++ b/util/intelp2m/description.md @@ -16,7 +16,6 @@ It is possible to use templates for parsing files of excellent inteltool.log. To specify such a pattern, use the option -t <template number>. For example, using template type # 1, you can parse gpio.h from an already added board in the coreboot project. - ```bash (shell)$ ./intelp2m -h -t @@ -30,7 +29,6 @@ You can also add add a template to 'parser/template.go' for your file type with the configuration of the pads. platform type is set using the -p option (Sunrise by default): - ```bash -p string set up a platform @@ -56,7 +54,6 @@ Use the -fld=cb option to only generate a sequence of bit fields in a new macro: ```bash (shell)$ ./intelp2m -fld cb -p apl -file ../apollo-inteltool.log ``` - ```c _PAD_CFG_STRUCT(GPIO_37, PAD_FUNC(NF1) | PAD_TRIG(OFF) | PAD_TRIG(OFF), PAD_PULL(DN_20K)), /* LPSS_UART0_TXD */ ``` @@ -69,96 +66,73 @@ to use the -fld=raw option: ```bash (shell)$ ./intelp2m -fld raw -file /path/to/inteltool.log ``` - ```c -_PAD_CFG_STRUCT(GPP_A10, 0x44000500, 0x00000000), /* CLKOUT_LPC1 */ +_PAD_CFG_STRUCT(GPP_A10, 0x44000500, 0x00000000), ``` ```bash (shell)$ ./intelp2m -iiii -fld raw -file /path/to/inteltool.log ``` - ```c -/* GPP_A10 - CLKOUT_LPC1 DW0: 0x44000500, DW1: 0x00000000 */ +/* GPP_A10 - CLKOUT_LPC1 */ +/* DW0: 0x44000500, DW1: 0x00000000 */ +/* DW0: 0x04000100 - IGNORED */ /* PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), */ -/* DW0 : 0x04000100 - IGNORED */ _PAD_CFG_STRUCT(GPP_A10, 0x44000500, 0x00000000), ``` -### FSP-style macro - -The utility allows to generate macros that include fsp/edk2-palforms style bitfields: - -```bash -(shell)$ ./intelp2m -fld fsp -p lbg -file ../crb-inteltool.log -``` - -```c -{ GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone, GpioPadConfigLock }, /* GPIO */ -``` - -```bash -(shell)$ ./intelp2m -iiii -fld fsp -p lbg -file ../crb-inteltool.log -``` - -```c -/* GPP_A12 - GPIO DW0: 0x80880102, DW1: 0x00000000 */ -/* PAD_CFG_GPI_SCI(GPP_A12, NONE, PLTRST, LEVEL, INVERT), */ -{ GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone, GpioPadConfigLock }, -``` - ### Macro Check After generating the macro, the utility checks all used fields of the configuration registers. If some field has been ignored, the utility generates field macros. To not check macros, use the -n option: - ```bash (shell)$ ./intelp2m -n -file /path/to/inteltool.log ``` In this case, some fields of the configuration registers DW0 will be ignored. - ```c -PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */ -PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_TXD */ +PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), +PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), ``` ### Information level The utility can generate additional information about the bit -fields of the DW0 and DW1 configuration registers: +fields of the DW0 and DW1 configuration registers. Using the +options -i, -ii, -iii, -iiii you can set the info level from +1 to 4: +```bash +(shell)$./intelp2m -i -file /path/to/inteltool.log +``` ```c -/* GPIO_39 - LPSS_UART0_TXD (DW0: 0x44000400, DW1: 0x00003100) */ --> (2) -/* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */ --> (3) -/* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (4) -_PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), +_PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), /* LPSS_UART0_TXD */ ``` -Using the options -i, -ii, -iii, -iiii you can set the info level -from (1) to (4): - ```bash -(shell)$./intelp2m -i -file /path/to/inteltool.log (shell)$./intelp2m -ii -file /path/to/inteltool.log (shell)$./intelp2m -iii -file /path/to/inteltool.log (shell)$./intelp2m -iiii -file /path/to/inteltool.log ``` -(1) : print /* GPIO_39 - LPSS_UART0_TXD */ - -(2) : print initial raw values of configuration registers from -inteltool dump -DW0: 0x44000400, DW1: 0x00003100 +```c +/* GPIO_39 - LPSS_UART0_TXD */ +/* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii) +/* DW0 : PAD_TRIG(OFF) - IGNORED */ --> (iii) +/* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */ --> (iiii) +_PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), +``` -(3) : print the target macro that will generate if you use the --n option +If the -n switch was used and macros was generated without checking: +```c +/* GPIO_39 - LPSS_UART0_TXD */ --> (i) +/* DW0: 0x44000400, DW1: 0x00003100 */ --> (ii) +/* DW0: PAD_TRIG(OFF) - IGNORED */ --> (iii) +/* _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP) | PAD_TRIG(OFF), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), */ --> (iiii) PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), - -(4) : print decoded fields from (3) as macros -DW0 : PAD_TRIG(OFF) - IGNORED +``` ### Ignoring Fields @@ -168,35 +142,35 @@ from it that are not in the corresponding PAD_CFG_*() macro: ```bash (shell)$ ./intelp2m -iiii -fld cb -ign -file /path/to/inteltool.log ``` - ```c -/* GPIO_39 - LPSS_UART0_TXD DW0: 0x44000400, DW1: 0x00003100 */ +/* GPIO_39 - LPSS_UART0_TXD */ +/* DW0: 0x44000400, DW1: 0x00003100 */ +/* DW0: PAD_TRIG(OFF) - IGNORED */ /* PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), */ -/* DW0 : PAD_TRIG(OFF) - IGNORED */ _PAD_CFG_STRUCT(GPIO_39, PAD_FUNC(NF1) | PAD_RESET(DEEP), PAD_PULL(UP_20K) | PAD_IOSTERM(DISPUPD)), ``` -If you generate macros without checking, you can see bit fields that -were ignored: +### FSP-style macro + +The utility allows to generate macros that include fsp/edk2-palforms style bitfields: ```bash -(shell)$ ./intelp2m -iiii -n -file /path/to/inteltool.log +(shell)$ ./intelp2m -i -fld fsp -p lbg -file ../crb-inteltool.log ``` - ```c -/* GPIO_39 - LPSS_UART0_TXD DW0: 0x44000400, DW1: 0x00003100 */ -PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), -/* DW0 : PAD_TRIG(OFF) - IGNORED */ +{ GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone, GpioPadConfigLock }, /* GPIO */ ``` ```bash -(shell)$ ./intelp2m -n -file /path/to/inteltool.log +(shell)$ ./intelp2m -iiii -fld fsp -p lbg -file ../crb-inteltool.log ``` - ```c -/* GPIO_39 - LPSS_UART0_TXD */ -PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), +/* GPP_A12 - GPIO */ +/* DW0: 0x80880102, DW1: 0x00000000 */ +/* PAD_CFG_GPI_SCI(GPP_A12, NONE, PLTRST, LEVEL, INVERT), */ +{ GPIO_SKL_H_GPP_A12, { GpioPadModeGpio, GpioHostOwnAcpi, GpioDirInInvOut, GpioOutLow, GpioIntSci | GpioIntLvlEdgDis, GpioResetNormal, GpioTermNone, GpioPadConfigLock }, ``` + ### Supports Chipsets Sunrise PCH, Lewisburg PCH, Apollo Lake SoC, CannonLake-LP SoCs diff --git a/util/intelp2m/fields/cb/cb.go b/util/intelp2m/fields/cb/cb.go index 61f59c4f3e..2a87cdaa88 100644 --- a/util/intelp2m/fields/cb/cb.go +++ b/util/intelp2m/fields/cb/cb.go @@ -50,7 +50,9 @@ func (FieldMacros) DecodeDW0() { generate( &field { prefix : "PAD_FUNC", - unhide : config.InfoLevelGet() <= 3 || dw0.GetPadMode() != 0, + // TODO: Find another way to hide PAD_FUNC(GPIO) in the comment with + // ignored fields + unhide : config.InfoLevelGet() < 3 || dw0.GetPadMode() != 0, configurator : func() { macro.Padfn() }, }, diff --git a/util/intelp2m/main.go b/util/intelp2m/main.go index 8527c54586..a7bbc91079 100644 --- a/util/intelp2m/main.go +++ b/util/intelp2m/main.go @@ -51,27 +51,12 @@ func main() { "\tIn this case, some fields of the configuration registers\n" + "\tDW0 will be ignored.\n") - infoLevel1 := flag.Bool("i", - false, - "\n\tInfo Level 1: adds DW0/DW1 value to the comments:\n" + - "\t/* GPIO_173 - SDCARD_D0 */\n") - - infoLevel2 := flag.Bool("ii", - false, - "Info Level 2: adds original macro to the comments:\n" + - "\t/* GPIO_173 - SDCARD_D0 (DW0: 0x44000400, DW1: 0x00021000) */\n") - - infoLevel3 := flag.Bool("iii", - false, - "Info Level 3: adds information about bit fields that (need to be ignored)\n" + - "\twere ignored to generate a macro:\n" + - "\t/* GPIO_173 - SDCARD_D0 (DW0: 0x44000400, DW1: 0x00021000) */\n" + - "\t/* PAD_CFG_NF_IOSSTATE(GPIO_173, DN_20K, DEEP, NF1, HIZCRx1), */\n") - - infoLevel4 := flag.Bool("iiii", - false, - "Info Level 4: show decoded DW0/DW1 register:\n" + - "\t/* DW0: PAD_TRIG(DEEP) | PAD_BUF(TX_RX_DISABLE) - IGNORED */\n") + infoLevels := []*bool { + flag.Bool("i", false, "Show pads function in the comments"), + flag.Bool("ii", false, "Show DW0/DW1 value in the comments"), + flag.Bool("iii", false, "Show ignored bit fields in the comments"), + flag.Bool("iiii", false, "Show target PAD_CFG() macro in the comments"), + } template := flag.Int("t", 0, "template type number\n"+ "\t0 - inteltool.log (default)\n"+ @@ -94,14 +79,12 @@ func main() { config.IgnoredFieldsFlagSet(*ignFlag) config.NonCheckingFlagSet(*nonCheckFlag) - if *infoLevel1 { - config.InfoLevelSet(1) - } else if *infoLevel2 { - config.InfoLevelSet(2) - } else if *infoLevel3 { - config.InfoLevelSet(3) - } else if *infoLevel4 { - config.InfoLevelSet(4) + for level, flag := range infoLevels { + if *flag { + config.InfoLevelSet(level + 1) + fmt.Printf("Info level: Use level %d!\n", level + 1) + break + } } if !config.TemplateSet(*template) { diff --git a/util/intelp2m/parser/parser.go b/util/intelp2m/parser/parser.go index d4c04cd02b..c0dc65f769 100644 --- a/util/intelp2m/parser/parser.go +++ b/util/intelp2m/parser/parser.go @@ -39,7 +39,7 @@ type padInfo struct { // generate - wrapper for Fprintf(). Writes text to the file specified // in config.OutputGenFile -func (info *padInfo) generate(lvl uint8, line string, a ...interface{}) { +func (info *padInfo) generate(lvl int, line string, a ...interface{}) { if config.InfoLevelGet() >= lvl { fmt.Fprintf(config.OutputGenFile, line, a...) } @@ -65,13 +65,15 @@ func (info *padInfo) reservedFprint() { // gpio : gpio.c file descriptor // macro : string of the generated macro func (info *padInfo) padInfoMacroFprint(macro string) { - info.generate(2, "\n") - info.generate(1, "\t/* %s - %s ", info.id, info.function) - info.generate(2, "DW0: 0x%0.8x, DW1: 0x%0.8x ", info.dw0, info.dw1) - info.generate(1, "*/\n") + info.generate(2, + "\n\t/* %s - %s */\n\t/* DW0: 0x%0.8x, DW1: 0x%0.8x */\n", + info.id, + info.function, + info.dw0, + info.dw1) info.generate(0, "\t%s", macro) - if config.InfoLevelGet() == 0 { - info.generate(0, "\t/* %s */", info.function) + if config.InfoLevelGet() == 1 { + info.generate(1, "\t/* %s */", info.function) } info.generate(0, "\n") } diff --git a/util/intelp2m/platforms/common/macro.go b/util/intelp2m/platforms/common/macro.go index e30ef225fe..38937f66b9 100644 --- a/util/intelp2m/platforms/common/macro.go +++ b/util/intelp2m/platforms/common/macro.go @@ -292,32 +292,27 @@ func (macro *Macro) Or() *Macro { return macro } -// AddToMacroIgnoredMask - Print info about ignored field mask -// title - warning message -func (macro *Macro) AddToMacroIgnoredMask() *Macro { - if config.InfoLevelGet() < 4 || config.IsFspStyleMacro() { - return macro +// DecodeIgnored - Add info about ignored field mask +// reg : PAD_CFG_DW0 or PAD_CFG_DW1 register +func (macro *Macro) DecodeIgnored(reg uint8) *Macro { + var decode = map[uint8]func() { + PAD_CFG_DW0: macro.Fields.DecodeDW0, + PAD_CFG_DW1: macro.Fields.DecodeDW1, } - dw0 := macro.Register(PAD_CFG_DW0) - dw1 := macro.Register(PAD_CFG_DW1) - // Get mask of ignored bit fields. - dw0Ignored := dw0.IgnoredFieldsGet() - dw1Ignored := dw1.IgnoredFieldsGet() - if dw0Ignored != 0 { - dw0temp := dw0.ValueGet() - dw0.ValueSet(dw0Ignored) - macro.Add("\n\t/* DW0 : ") - macro.Fields.DecodeDW0() - macro.Add(" - IGNORED */") - dw0.ValueSet(dw0temp) + decodefn, valid := decode[reg] + if !valid || config.IsFspStyleMacro() { + return macro } - if dw1Ignored != 0 { - dw1temp := dw1.ValueGet() - dw1.ValueSet(dw1Ignored) - macro.Add("\n\t/* DW1 : ") - macro.Fields.DecodeDW1() - macro.Add(" - IGNORED */") - dw1.ValueSet(dw1temp) + dw := macro.Register(reg) + ignored := dw.IgnoredFieldsGet() + if ignored != 0 { + temp := dw.ValueGet() + dw.ValueSet(ignored) + regnum := strconv.Itoa(int(reg)) + macro.Add("/* DW" + regnum + ": ") + decodefn() + macro.Add(" - IGNORED */\n\t") + dw.ValueSet(temp) } return macro } @@ -331,15 +326,19 @@ func (macro *Macro) GenerateFields() *Macro { dw0Ignored := dw0.IgnoredFieldsGet() dw1Ignored := dw1.IgnoredFieldsGet() - if config.InfoLevelGet() <= 1 { + if config.InfoLevelGet() != 4 { macro.Clear() - } else if config.InfoLevelGet() >= 3 { + } + if config.InfoLevelGet() >= 3 { // Add string of reference macro as a comment reference := macro.Get() macro.Clear() - macro.Add("/* ").Add(reference).Add(" */") - macro.AddToMacroIgnoredMask() - macro.Add("\n\t") + /* DW0 : PAD_TRIG(OFF) | PAD_BUF(RX_DISABLE) | 1 - IGNORED */ + macro.DecodeIgnored(PAD_CFG_DW0).DecodeIgnored(PAD_CFG_DW1) + if config.InfoLevelGet() >= 4 { + /* PAD_CFG_NF(GPP_B23, 20K_PD, PLTRST, NF2), */ + macro.Add("/* ").Add(reference).Add(" */\n\t") + } } if config.AreFieldsIgnored() { // Consider bit fields that should be ignored when regenerating @@ -409,8 +408,19 @@ func (macro *Macro) Generate() string { } if config.IsNonCheckingFlagUsed() { - macro.AddToMacroIgnoredMask() - return macro.Get() + body := macro.Get() + if config.InfoLevelGet() >= 3 { + macro.Clear().DecodeIgnored(PAD_CFG_DW0).DecodeIgnored(PAD_CFG_DW1) + comment := macro.Get() + if config.InfoLevelGet() >= 4 { + macro.Clear().Add("/* ") + macro.Fields.GenerateString() + macro.Add(" */\n\t") + comment += macro.Get() + } + return comment + body + } + return body } return macro.check().Get() |