diff options
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/memmap.c | 30 |
2 files changed, 33 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h index edfeafc8a4..4167895729 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h @@ -18,6 +18,9 @@ #ifndef _SOC_BROADWELL_DE_H_ #define _SOC_BROADWELL_DE_H_ +uintptr_t sa_get_tseg_base(void); +size_t sa_get_tseg_size(void); + #define VTBAR_OFFSET 0x180 #define VTBAR_MASK 0xffffe000 #define VTBAR_ENABLED 0x01 diff --git a/src/soc/intel/fsp_broadwell_de/memmap.c b/src/soc/intel/fsp_broadwell_de/memmap.c index 75100948b9..36f400c7b3 100644 --- a/src/soc/intel/fsp_broadwell_de/memmap.c +++ b/src/soc/intel/fsp_broadwell_de/memmap.c @@ -14,10 +14,40 @@ * GNU General Public License for more details. */ +#define __SIMPLE_DEVICE__ + #include <cbmem.h> #include <drivers/intel/fsp1_0/fsp_util.h> +#include <soc/broadwell_de.h> +#include <soc/pci_devs.h> +#include <device/pci_ops.h> void *cbmem_top(void) { return find_fsp_reserved_mem(*(void **)CBMEM_FSP_HOB_PTR); } + +/* + * Get TSEG base. + */ +uintptr_t sa_get_tseg_base(void) +{ + const pci_devfn_t dev = PCI_DEV(BUS0, VTD_DEV, VTD_FUNC); + + /* All regions concerned for have 1 MiB alignment. */ + return ALIGN_DOWN(pci_read_config32(dev, TSEG_BASE), 1 * MiB); +} + +size_t sa_get_tseg_size(void) +{ + const pci_devfn_t dev = PCI_DEV(BUS0, VTD_DEV, VTD_FUNC); + + /* All regions concerned for have 1 MiB alignment. */ + size_t ret = ALIGN_DOWN(pci_read_config32(dev, TSEG_LIMIT), 1 * MiB); + + /* Lower 20bit of TSEG_LIMIT are don't care, need to add 1MiB */ + ret += 1 * MiB; + + /* Subtract base to get the size */ + return ret - sa_get_tseg_base(); +} |