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-rw-r--r--src/soc/mediatek/mt8196/Makefile.mk4
-rw-r--r--src/soc/mediatek/mt8196/l2c_ops.c45
-rw-r--r--src/soc/mediatek/mt8196/soc.c2
3 files changed, 51 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk
index 96aea39986..44fa59e927 100644
--- a/src/soc/mediatek/mt8196/Makefile.mk
+++ b/src/soc/mediatek/mt8196/Makefile.mk
@@ -13,8 +13,12 @@ bootblock-y += ../common/mmu_operations.c
romstage-y += ../common/cbmem.c
romstage-y += emi.c
+romstage-y += l2c_ops.c
+romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
ramstage-y += emi.c
+ramstage-y += l2c_ops.c
+ramstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c
ramstage-y += soc.c
CPPFLAGS_common += -Isrc/soc/mediatek/mt8196/include
diff --git a/src/soc/mediatek/mt8196/l2c_ops.c b/src/soc/mediatek/mt8196/l2c_ops.c
new file mode 100644
index 0000000000..b51c49cc15
--- /dev/null
+++ b/src/soc/mediatek/mt8196/l2c_ops.c
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8196 Functional Specification
+ * Chapter number: 9
+ */
+
+#include <device/mmio.h>
+#include <soc/mmu_operations.h>
+
+DEFINE_BIT(MP0_CLUSTER_CFG0_L3_SHARE_FULLNHALF, 0)
+DEFINE_BIT(MP0_CLUSTER_CFG0_L3_SHARE_EN, 1)
+DEFINE_BIT(MP0_CLUSTER_CFG0_L3_SHARE_PRE_EN, 2)
+
+#define MP0_CLUSTER_CFG0 0x0C000060
+#define CLUST_DIS_VAL 0x3
+#define CLUST_DIS_SHIFT 0x4
+
+void mtk_soc_disable_l2c_sram(void)
+{
+ unsigned long v;
+
+ uint32_t *mp0_cluster_cfg0 = (void *)(MP0_CLUSTER_CFG0);
+
+ SET32_BITFIELDS(mp0_cluster_cfg0,
+ MP0_CLUSTER_CFG0_L3_SHARE_EN, 0);
+ dsb();
+
+ __asm__ volatile ("mrs %0, S3_0_C15_C3_5" : "=r" (v));
+ v |= (CLUST_DIS_VAL << CLUST_DIS_SHIFT);
+ __asm__ volatile ("msr S3_0_C15_C3_5, %0" : : "r" (v));
+ dsb();
+
+ do {
+ __asm__ volatile ("mrs %0, S3_0_C15_C3_7" : "=r" (v));
+ } while (((v >> CLUST_DIS_SHIFT) & CLUST_DIS_VAL) != CLUST_DIS_VAL);
+
+ SET32_BITFIELDS(mp0_cluster_cfg0,
+ MP0_CLUSTER_CFG0_L3_SHARE_PRE_EN, 0);
+
+ SET32_BITFIELDS(mp0_cluster_cfg0,
+ MP0_CLUSTER_CFG0_L3_SHARE_FULLNHALF, 0);
+
+ dsb();
+}
diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c
index b77735ceed..b62c055426 100644
--- a/src/soc/mediatek/mt8196/soc.c
+++ b/src/soc/mediatek/mt8196/soc.c
@@ -2,6 +2,7 @@
#include <device/device.h>
#include <soc/emi.h>
+#include <soc/mmu_operations.h>
#include <symbols.h>
static void soc_read_resources(struct device *dev)
@@ -11,6 +12,7 @@ static void soc_read_resources(struct device *dev)
static void soc_init(struct device *dev)
{
+ mtk_mmu_disable_l2c_sram();
}
static struct device_operations soc_ops = {