diff options
| -rw-r--r-- | src/soc/amd/mendocino/fch.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/reset.c | 4 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/amd/mendocino/fch.c b/src/soc/amd/mendocino/fch.c index d7c488bf67..abe2dc1177 100644 --- a/src/soc/amd/mendocino/fch.c +++ b/src/soc/amd/mendocino/fch.c @@ -126,6 +126,11 @@ static void fch_init_acpi_ports(void) PM_ACPI_TIMER_EN_EN); } +static void fch_init_resets(void) +{ + pm_write16(PWR_RESET_CFG, pm_read16(PWR_RESET_CFG) | TOGGLE_ALL_PWR_GOOD); +} + /* configure the general purpose PCIe clock outputs according to the devicetree settings */ static void gpp_clk_setup(void) { @@ -197,6 +202,7 @@ static void cgpll_clock_gate_init(void) void fch_init(void *chip_info) { + fch_init_resets(); i2c_soc_init(); fch_init_acpi_ports(); diff --git a/src/soc/amd/mendocino/reset.c b/src/soc/amd/mendocino/reset.c index 800374c260..ac0c981718 100644 --- a/src/soc/amd/mendocino/reset.c +++ b/src/soc/amd/mendocino/reset.c @@ -17,8 +17,8 @@ void do_cold_reset(void) void do_warm_reset(void) { - /* Assert reset signals only. */ - outb(RST_CPU | SYS_RST, RST_CNT); + /* Warm resets are not supported and must be executed as cold */ + do_cold_reset(); } void do_board_reset(void) |