diff options
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 2c82c38ca4..dd5f197a19 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -74,7 +74,9 @@ static const struct slot_irq_constraints irq_constraints[] = { .slot = PCH_DEV_SLOT_THERMAL, .fns = { ANY_PIRQ(PCH_DEVFN_THERMAL), +#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) ANY_PIRQ(PCH_DEVFN_UFS), +#endif DIRECT_IRQ(PCH_DEVFN_GSPI2), }, }, @@ -122,17 +124,21 @@ static const struct slot_irq_constraints irq_constraints[] = { { .slot = PCH_DEV_SLOT_SIO2, .fns = { +#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) DIRECT_IRQ(PCH_DEVFN_I2C4), DIRECT_IRQ(PCH_DEVFN_I2C5), +#endif DIRECT_IRQ(PCH_DEVFN_UART2), }, }, +#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) { .slot = PCH_DEV_SLOT_STORAGE, .fns = { ANY_PIRQ(PCH_DEVFN_EMMC), }, }, +#endif #if CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) { .slot = PCH_DEV_SLOT_PCIE_2, |