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-rw-r--r--src/soc/amd/cezanne/fsp_m_params.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c
index 9d4159d85b..a83b8b2f57 100644
--- a/src/soc/amd/cezanne/fsp_m_params.c
+++ b/src/soc/amd/cezanne/fsp_m_params.c
@@ -113,5 +113,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mcfg->cppc_epp_min_range = config->cppc_epp_min_range;
mcfg->cppc_preferred_cores = config->cppc_preferred_cores;
+ /* S0i3 enable */
+ mcfg->s0i3_enable = config->s0ix_enable;
+
fsp_fill_pcie_ddi_descriptors(mcfg);
}