diff options
| -rw-r--r-- | src/drivers/intel/fsp1_1/car.c | 14 | ||||
| -rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/car.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/car_stage.S | 41 |
4 files changed, 6 insertions, 52 deletions
diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c index a1ee7b141a..82dc320e0e 100644 --- a/src/drivers/intel/fsp1_1/car.c +++ b/src/drivers/intel/fsp1_1/car.c @@ -15,6 +15,7 @@ #include <arch/symbols.h> #include <console/console.h> +#include <cpu/intel/romstage.h> #include <cpu/x86/mtrr.h> #include <fsp/car.h> #include <fsp/util.h> @@ -27,7 +28,7 @@ /* platform_enter_postcar() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use, * and continues execution in postcar stage. */ -static void platform_enter_postcar(void) +void platform_enter_postcar(void) { struct postcar_frame pcf; size_t alignment; @@ -153,17 +154,15 @@ asmlinkage void cache_as_ram_main(struct cache_as_ram_params *car_params) platform_enter_postcar(); } -/* This is the romstage C entry for platforms with - CONFIG_C_ENVIRONMENT_BOOTBLOCK */ -asmlinkage void romstage_c_entry(void) +/* This is the entry for platforms with CONFIG_C_ENVIRONMENT_BOOTBLOCK + called from cpu/intel/car/romstage.c */ +void mainboard_romstage_entry(unsigned long bist) { /* Need to locate the current FSP_INFO_HEADER. The cache-as-ram * is still enabled. We can directly access work buffer here. */ FSP_INFO_HEADER *fih; struct prog fsp = PROG_INIT(PROG_REFCODE, "fsp.bin"); - console_init(); - if (prog_locate(&fsp)) { fih = NULL; printk(BIOS_ERR, "Unable to locate %s\n", prog_name(&fsp)); @@ -174,9 +173,6 @@ asmlinkage void romstage_c_entry(void) } cache_as_ram_stage_main(fih); - - /* we don't return here */ - platform_enter_postcar(); } void __weak car_mainboard_pre_console_init(void) diff --git a/src/drivers/intel/fsp1_1/include/fsp/car.h b/src/drivers/intel/fsp1_1/include/fsp/car.h index 0ae687a9d7..c05139231c 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/car.h +++ b/src/drivers/intel/fsp1_1/include/fsp/car.h @@ -31,7 +31,6 @@ struct cache_as_ram_params { /* Entry points from the cache-as-ram assembly code. */ asmlinkage void cache_as_ram_main(struct cache_as_ram_params *car_params); -asmlinkage void romstage_c_entry(void); /* Per stage calls from the above two functions. The void * return from * cache_as_ram_stage_main() is the stack pointer to use in RAM after * exiting cache-as-ram mode. */ diff --git a/src/soc/intel/skylake/romstage/Makefile.inc b/src/soc/intel/skylake/romstage/Makefile.inc index 8bfbfea66a..e929ebaf17 100644 --- a/src/soc/intel/skylake/romstage/Makefile.inc +++ b/src/soc/intel/skylake/romstage/Makefile.inc @@ -1,4 +1,4 @@ -romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += car_stage.S +romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += ../../../../cpu/intel/car/romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP1_1) += romstage.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage_fsp20.c romstage-y += systemagent.c diff --git a/src/soc/intel/skylake/romstage/car_stage.S b/src/soc/intel/skylake/romstage/car_stage.S deleted file mode 100644 index d8b45cb258..0000000000 --- a/src/soc/intel/skylake/romstage/car_stage.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 Google Inc - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <cpu/x86/post_code.h> - -/* I/O delay between post codes on failure */ -#define LHLT_DELAY 0x50000 - -.text -.global car_stage_entry -car_stage_entry: - call romstage_c_entry - - /* we don't return here */ - movb $0x69, %ah - jmp .Lhlt - -.Lhlt: - xchg %al, %ah -#if CONFIG(POST_IO) - outb %al, $CONFIG_POST_IO_PORT -#else - post_code(POST_DEAD_CODE) -#endif - movl $LHLT_DELAY, %ecx -.Lhlt_Delay: - outb %al, $0xED - loop .Lhlt_Delay - jmp .Lhlt |