diff options
| -rw-r--r-- | src/arch/arm/include/armv7.h | 9 | ||||
| -rw-r--r-- | src/cpu/armltd/cortex-a9/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/cpu/armltd/cortex-a9/cache.c | 42 |
3 files changed, 1 insertions, 53 deletions
diff --git a/src/arch/arm/include/armv7.h b/src/arch/arm/include/armv7.h index 147323457a..f81bc0649d 100644 --- a/src/arch/arm/include/armv7.h +++ b/src/arch/arm/include/armv7.h @@ -66,11 +66,4 @@ #define CP15DSB asm volatile ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)) #define CP15DMB asm volatile ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0)) -void v7_outer_cache_enable(void); -void v7_outer_cache_disable(void); -void v7_outer_cache_flush_all(void); -void v7_outer_cache_inval_all(void); -void v7_outer_cache_flush_range(u32 start, u32 end); -void v7_outer_cache_inval_range(u32 start, u32 end); - -#endif +#endif /* ARMV7_H */ diff --git a/src/cpu/armltd/cortex-a9/Makefile.inc b/src/cpu/armltd/cortex-a9/Makefile.inc deleted file mode 100644 index f1a3689691..0000000000 --- a/src/cpu/armltd/cortex-a9/Makefile.inc +++ /dev/null @@ -1,3 +0,0 @@ -ramstage-y += cache.c -romstage-y += cache.c -bootblock-y += cache.c diff --git a/src/cpu/armltd/cortex-a9/cache.c b/src/cpu/armltd/cortex-a9/cache.c deleted file mode 100644 index 7c91d69f9a..0000000000 --- a/src/cpu/armltd/cortex-a9/cache.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright (C) 2013 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <armv7.h> - -/* - * Sets L2 cache related parameters before enabling data cache - */ -void v7_outer_cache_enable(void) -{ -} - -/* stubs so we don't need weak symbols in cache_v7.c */ -void v7_outer_cache_disable(void) -{ -} - -void v7_outer_cache_flush_all(void) -{ -} - -void v7_outer_cache_inval_all(void) -{ -} - -void v7_outer_cache_flush_range(u32 start, u32 end) -{ -} - -void v7_outer_cache_inval_range(u32 start, u32 end) -{ -} |