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-rw-r--r--src/soc/intel/cannonlake/include/soc/lpc.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/lpc.h b/src/soc/intel/cannonlake/include/soc/lpc.h
index a510bc51a9..c16b732b26 100644
--- a/src/soc/intel/cannonlake/include/soc/lpc.h
+++ b/src/soc/intel/cannonlake/include/soc/lpc.h
@@ -24,10 +24,6 @@
#define LPC_GEN3_DEC 0x8c /* LPC IF Generic Decode Range 3 */
#define LPC_GEN4_DEC 0x90 /* LPC IF Generic Decode Range 4 */
#define LGMR 0x98 /* LPC Generic Memory Range */
-#define BIOS_CNTL 0xdc
-#define LPC_BC_BILD (1 << 7) /* BILD */
-#define LPC_BC_LE (1 << 1) /* LE */
-#define LPC_BC_EISS (1 << 5) /* EISS */
#define PCCTL 0xE0 /* PCI Clock Control */
#define CLKRUN_EN (1 << 0)