diff options
| -rw-r--r-- | src/mainboard/google/deltaur/variants/baseboard/devicetree.cb | 1 | ||||
| -rw-r--r-- | src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb index aeab2d4bf2..067222440c 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb @@ -25,7 +25,6 @@ chip soc/intel/tigerlake # FSP configuration register "SaGv" = "SaGv_Disabled" - register "SataMode" = "0" register "SataSalpSupport" = "1" # TODO: the lengths are all MID for right now. diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 1958e99791..a93a38a830 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -146,7 +146,6 @@ chip soc/intel/tigerlake register "PcieClkSrcUsage[6]" = "PCIE_CLK_NOTUSED" # Enable SATA - register "SataMode" = "0" register "SataSalpSupport" = "1" register "SataPortsEnable[0]" = "0" register "SataPortsEnable[1]" = "1" |