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-rw-r--r--src/soc/amd/common/block/acpi/ivrs.c2
-rw-r--r--src/soc/amd/common/block/lpc/espi_util.c2
-rw-r--r--src/soc/amd/common/fsp/dmi.c1
-rw-r--r--src/soc/amd/common/pi/agesawrapper.c1
-rw-r--r--src/soc/amd/common/pi/heapmanager.c3
-rw-r--r--src/soc/amd/genoa_poc/early_fch.c1
-rw-r--r--src/soc/amd/glinda/psp_verstage/svc.c1
-rw-r--r--src/soc/amd/mendocino/fsp_s_params.c1
-rw-r--r--src/soc/amd/mendocino/psp_verstage/svc.c1
-rw-r--r--src/soc/amd/phoenix/psp_verstage/svc.c1
-rw-r--r--src/soc/amd/picasso/acpi_crat.c1
11 files changed, 0 insertions, 15 deletions
diff --git a/src/soc/amd/common/block/acpi/ivrs.c b/src/soc/amd/common/block/acpi/ivrs.c
index 74c5c39b52..a2f77150c9 100644
--- a/src/soc/amd/common/block/acpi/ivrs.c
+++ b/src/soc/amd/common/block/acpi/ivrs.c
@@ -131,7 +131,6 @@ static void ivrs_add_device_or_bridge(struct device *parent, struct device *dev,
} else if ((header_type == PCI_HEADER_TYPE_NORMAL) && !is_pcie) {
/* Device is legacy PCI or PCI-X */
add_ivhd_dev_entry(parent, dev, current, IVHD_DEV_8_BYTE_ALIAS_SELECT, 0x0);
-
}
}
@@ -316,7 +315,6 @@ static unsigned long acpi_fill_ivrs(acpi_ivrs_t *ivrs, unsigned long current)
ivhd = &ivrs->ivhd;
while ((dev = dev_find_path(dev, DEVICE_PATH_DOMAIN)) != NULL) {
-
nb_dev = pcidev_path_behind(dev->downstream, PCI_DEVFN(0, 0));
iommu_dev = pcidev_path_behind(dev->downstream, PCI_DEVFN(0, 2));
if (!nb_dev) {
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c
index c0f2354f4f..f05575ab74 100644
--- a/src/soc/amd/common/block/lpc/espi_util.c
+++ b/src/soc/amd/common/block/lpc/espi_util.c
@@ -317,7 +317,6 @@ static int espi_get_unused_mmio_window(void)
}
return -1;
-
}
static size_t espi_get_mmio_window_size(int idx)
@@ -824,7 +823,6 @@ static enum cb_err espi_wait_channel_ready(uint16_t slave_reg_addr)
printk(BIOS_ERR, "Channel is not ready after %d usec (slave addr: 0x%x)\n",
ESPI_CH_READY_TIMEOUT_US, slave_reg_addr);
return CB_ERR;
-
}
static void espi_enable_ctrlr_channel(uint32_t channel_en)
diff --git a/src/soc/amd/common/fsp/dmi.c b/src/soc/amd/common/fsp/dmi.c
index d0d98738e8..d132590483 100644
--- a/src/soc/amd/common/fsp/dmi.c
+++ b/src/soc/amd/common/fsp/dmi.c
@@ -23,7 +23,6 @@
*/
static uint16_t ddr_speed_mhz_to_reported_mts(uint16_t ddr_type, uint16_t speed)
{
-
if (CONFIG(USE_DDR4) && ddr_type == MEMORY_TYPE_DDR4)
return ddr4_speed_mhz_to_reported_mts(speed);
else if (CONFIG(USE_LPDDR4) && ddr_type == MEMORY_TYPE_LPDDR4)
diff --git a/src/soc/amd/common/pi/agesawrapper.c b/src/soc/amd/common/pi/agesawrapper.c
index beae4baa9c..8ad1e0e4a9 100644
--- a/src/soc/amd/common/pi/agesawrapper.c
+++ b/src/soc/amd/common/pi/agesawrapper.c
@@ -387,7 +387,6 @@ static AGESA_STATUS ramstage_dispatch(AMD_CONFIG_PARAMS *StdHeader)
default:
return AGESA_UNSUPPORTED;
}
-
}
AGESA_STATUS agesa_execute_state(AGESA_STRUCT_NAME func)
diff --git a/src/soc/amd/common/pi/heapmanager.c b/src/soc/amd/common/pi/heapmanager.c
index 154f04d825..34a4837d73 100644
--- a/src/soc/amd/common/pi/heapmanager.c
+++ b/src/soc/amd/common/pi/heapmanager.c
@@ -236,7 +236,6 @@ AGESA_STATUS agesa_AllocateBuffer(uint32_t Func, uintptr_t Data,
* betterfit than the previous nodes
*/
if (BestFitNodeSize > FreedNodeSize) {
-
BestFitNodeOffset =
FreedNodeOffset;
BestFitPrevNodeOffset =
@@ -308,7 +307,6 @@ AGESA_STATUS agesa_AllocateBuffer(uint32_t Func, uintptr_t Data,
AGESA_STATUS agesa_DeallocateBuffer(uint32_t Func, uintptr_t Data,
void *ConfigPtr)
{
-
uint8_t *BiosHeapBaseAddr;
uint32_t AllocNodeOffset;
uint32_t PrevNodeOffset;
@@ -436,5 +434,4 @@ AGESA_STATUS agesa_LocateBuffer(uint32_t Func, uintptr_t Data, void *ConfigPtr)
}
return Status;
-
}
diff --git a/src/soc/amd/genoa_poc/early_fch.c b/src/soc/amd/genoa_poc/early_fch.c
index e134f49e18..d82ebcbcf8 100644
--- a/src/soc/amd/genoa_poc/early_fch.c
+++ b/src/soc/amd/genoa_poc/early_fch.c
@@ -30,5 +30,4 @@ void fch_pre_init(void)
/* After console init */
void fch_early_init(void)
{
-
}
diff --git a/src/soc/amd/glinda/psp_verstage/svc.c b/src/soc/amd/glinda/psp_verstage/svc.c
index 293bf46aa1..d533d8f664 100644
--- a/src/soc/amd/glinda/psp_verstage/svc.c
+++ b/src/soc/amd/glinda/psp_verstage/svc.c
@@ -183,7 +183,6 @@ uint32_t svc_modexp(struct mod_exp_params *mod_exp_param)
};
SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)&param, retval);
return retval;
-
}
uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size)
diff --git a/src/soc/amd/mendocino/fsp_s_params.c b/src/soc/amd/mendocino/fsp_s_params.c
index e1eff328fe..8374fb3b6a 100644
--- a/src/soc/amd/mendocino/fsp_s_params.c
+++ b/src/soc/amd/mendocino/fsp_s_params.c
@@ -19,7 +19,6 @@ static void fsp_assign_vbios_upds(FSP_S_CONFIG *scfg)
scfg->vbios_buffer = 0;
printk(BIOS_SPEW, "%s: using VBIOS cache; skipping GOP driver.\n", __func__);
return;
-
}
printk(BIOS_SPEW, "%s: not using VBIOS cache; running GOP driver.\n", __func__);
scfg->vbios_buffer = CONFIG(RUN_FSP_GOP) ? PCI_VGA_RAM_IMAGE_START : 0;
diff --git a/src/soc/amd/mendocino/psp_verstage/svc.c b/src/soc/amd/mendocino/psp_verstage/svc.c
index 53d1751535..0c6fb5e100 100644
--- a/src/soc/amd/mendocino/psp_verstage/svc.c
+++ b/src/soc/amd/mendocino/psp_verstage/svc.c
@@ -191,7 +191,6 @@ uint32_t svc_modexp(struct mod_exp_params *mod_exp_param)
};
SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)&param, retval);
return retval;
-
}
uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size)
diff --git a/src/soc/amd/phoenix/psp_verstage/svc.c b/src/soc/amd/phoenix/psp_verstage/svc.c
index 45d18c1456..6f086780b8 100644
--- a/src/soc/amd/phoenix/psp_verstage/svc.c
+++ b/src/soc/amd/phoenix/psp_verstage/svc.c
@@ -181,7 +181,6 @@ uint32_t svc_modexp(struct mod_exp_params *mod_exp_param)
};
SVC_CALL2(SVC_VERSTAGE_CMD, CMD_MODEXP, (void *)&param, retval);
return retval;
-
}
uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size)
diff --git a/src/soc/amd/picasso/acpi_crat.c b/src/soc/amd/picasso/acpi_crat.c
index e528515bab..bcc39013a0 100644
--- a/src/soc/amd/picasso/acpi_crat.c
+++ b/src/soc/amd/picasso/acpi_crat.c
@@ -372,7 +372,6 @@ static unsigned long gen_crat_tlb_entry(struct acpi_crat_header *crat, unsigned
new_entries = 0;
for (thread = 0; thread < total_num_threads; thread++) {
-
/* L1 data TLB */
if (thread % num_threads_sharing0 == 0) {
current = add_crat_tlb_entry(&tlb_affinity, current);