diff options
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/cfg.c | 7 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/cfg.h | 12 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 13 |
3 files changed, 11 insertions, 21 deletions
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index ac6e6aeb81..c6142409f1 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -132,11 +132,4 @@ void sb800_cimx_config(AMDSBCFG *sb_config) sb_config->GppPhyPllPowerDown = TRUE; //GPP power saving sb_config->SBGecPwr = 0x03;//11b << 5, rpr BDF: 00:20:06 sb_config->GecConfig = GEC_CONFIG; - -#ifndef __PRE_RAM__ - /* ramstage cimx config here */ - if (!sb_config->StdHeader.CALLBACK.CalloutPtr) { - sb_config->StdHeader.CALLBACK.CalloutPtr = sb800_callout_entry; - } -#endif //!__PRE_RAM__ } diff --git a/src/southbridge/amd/cimx/sb800/cfg.h b/src/southbridge/amd/cimx/sb800/cfg.h index f6a3ab0470..385333fae7 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.h +++ b/src/southbridge/amd/cimx/sb800/cfg.h @@ -29,16 +29,4 @@ */ void sb800_cimx_config(AMDSBCFG *sb_cfg); -/** - * @brief Entry point of Southbridge CIMx callout - * - * prototype UINT32 (*SBCIM_HOOK_ENTRY)(UINT32 Param1, UINT32 Param2, void* pConfig) - * - * @param[in] func Southbridge CIMx Function ID. - * @param[in] data Southbridge Input Data. - * @param[in] config Southbridge configuration structure pointer. - * - */ -u32 sb800_callout_entry(u32 func, u32 data, void* config); - #endif diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 19d7fb5379..9a08121d54 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -59,7 +59,7 @@ static AMDSBCFG *sb_config = &sb_late_cfg; * @param[in] config Southbridge configuration structure pointer. * */ -u32 sb800_callout_entry(u32 func, u32 data, void* config) +static u32 sb800_callout_entry(u32 func, u32 data, void* config) { u32 ret = 0; printk(BIOS_DEBUG, "SB800 - Late.c - %s - Start.\n", __func__); @@ -260,6 +260,15 @@ static const struct pci_driver gec_driver __pci_driver = { }; /** + * Fill build time defaults. + */ +static void sb800_init(void *chip_info) +{ + sb_config->StdHeader.CALLBACK.CalloutPtr = sb800_callout_entry; + sb800_cimx_config(sb_config); +} + +/** * South Bridge CIMx ramstage entry point wrapper. */ void sb_Before_Pci_Init(void) @@ -346,7 +355,6 @@ static void sb800_enable(device_t dev) abcfg_reg(0xc0, 0x01FF, 0x010); /* x4 Port_0 */ break; } - sb800_cimx_config(sb_config); if (dev->enabled) { sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_ENABLED; @@ -477,5 +485,6 @@ static void sb800_enable(device_t dev) struct chip_operations southbridge_amd_cimx_sb800_ops = { CHIP_NAME("ATI SB800") + .init = sb800_init, .enable_dev = sb800_enable, }; |