3 files changed, 17 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index dc1419f35a..d86e87da89 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -172,7 +172,12 @@
 #define  BIOS_PCI_EXP_EN	(1 << 10)
 #define  PWRBTN_LVL		(1 <<  9)
 #define  SMI_LOCK		(1 <<  4)
-#define  PER_SMI_SEL		(1 <<  0)
+#define  PER_SMI_SEL_MASK	(3 <<  0)
+#define    SMI_RATE_64S		(0 <<  0)
+#define    SMI_RATE_32S		(1 <<  0)
+#define    SMI_RATE_16S		(2 <<  0)
+#define    SMI_RATE_8S		(3 <<  0)
+
 #define GEN_PMCON3		0x1028
 #define  SLP_S3_ASSERT_WIDTH_SHIFT	10
 #define  SLP_S3_ASSERT_MASK	(0x3 << SLP_S3_ASSERT_WIDTH_SHIFT)
diff --git a/src/soc/intel/skylake/include/soc/pmc.h b/src/soc/intel/skylake/include/soc/pmc.h
index 165d57170e..50f605f09e 100644
--- a/src/soc/intel/skylake/include/soc/pmc.h
+++ b/src/soc/intel/skylake/include/soc/pmc.h
@@ -35,6 +35,12 @@
 #define  ALLOW_L1LOW_C0		(1 << 7)
 #define  ALLOW_L1LOW_OPI_ON	(1 << 6)
 #define  SMI_LOCK		(1 << 4)
+#define  PER_SMI_SEL_MASK	(3 << 0)
+#define    SMI_RATE_64S		(0 << 0)
+#define    SMI_RATE_32S		(1 << 0)
+#define    SMI_RATE_16S		(2 << 0)
+#define    SMI_RATE_8S		(3 << 0)
+
 #define GEN_PMCON_B		0xa4
 #define  SLP_STR_POL_LOCK	(1 << 18)
 #define  ACPI_BASE_LOCK		(1 << 17)
diff --git a/src/soc/intel/xeon_sp/lbg/include/soc/pmc.h b/src/soc/intel/xeon_sp/lbg/include/soc/pmc.h
index d49986339c..88a9b10606 100644
--- a/src/soc/intel/xeon_sp/lbg/include/soc/pmc.h
+++ b/src/soc/intel/xeon_sp/lbg/include/soc/pmc.h
@@ -25,6 +25,11 @@
 #define  MS4V			(1 << 18)
 #define  GBL_RST_STS		(1 << 16)
 #define  SMI_LOCK		(1 << 4)
+#define  PER_SMI_SEL_MASK	(3 << 1)
+#define    SMI_RATE_64S		(0 << 1)
+#define    SMI_RATE_32S		(1 << 1)
+#define    SMI_RATE_16S		(2 << 1)
+#define    SMI_RATE_8S		(3 << 1)
 #define GEN_PMCON_B		0xa4
 #define  SLP_STR_POL_LOCK	(1 << 18)
 #define  ACPI_BASE_LOCK		(1 << 17)