diff options
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/lpss.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/common/block/lpss/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/lpss/lpss.c | 11 |
3 files changed, 15 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/lpss.h b/src/soc/intel/common/block/include/intelblocks/lpss.h index 03a47144c8..138340df86 100644 --- a/src/soc/intel/common/block/include/intelblocks/lpss.h +++ b/src/soc/intel/common/block/include/intelblocks/lpss.h @@ -27,4 +27,7 @@ void lpss_reset_release(uintptr_t base); */ void lpss_clk_update(uintptr_t base, uint32_t clk_m_val, uint32_t clk_n_val); +/* Check if controller is in reset. */ +bool lpss_is_controller_in_reset(uintptr_t base); + #endif /* SOC_INTEL_COMMON_BLOCK_LPSS_H */ diff --git a/src/soc/intel/common/block/lpss/Makefile.inc b/src/soc/intel/common/block/lpss/Makefile.inc index 50d1c10850..6ed654f750 100644 --- a/src/soc/intel/common/block/lpss/Makefile.inc +++ b/src/soc/intel/common/block/lpss/Makefile.inc @@ -2,3 +2,4 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c verstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c +smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS) += lpss.c diff --git a/src/soc/intel/common/block/lpss/lpss.c b/src/soc/intel/common/block/lpss/lpss.c index 146fdab2ed..feacef370f 100644 --- a/src/soc/intel/common/block/lpss/lpss.c +++ b/src/soc/intel/common/block/lpss/lpss.c @@ -39,6 +39,17 @@ /* DMA Software Reset Control */ #define LPSS_DMA_RST_RELEASE (1 << 2) +bool lpss_is_controller_in_reset(uintptr_t base) +{ + uint8_t *addr = (void *)base; + uint32_t val = read32(addr + LPSS_RESET_CTL_REG); + + if (val == 0xFFFFFFFF) + return true; + + return !(val & LPSS_CNT_RST_RELEASE); +} + void lpss_reset_release(uintptr_t base) { uint8_t *addr = (void *)base; |