diff options
| -rw-r--r-- | src/southbridge/amd/agesa/hudson/sata.c | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/src/southbridge/amd/agesa/hudson/sata.c b/src/southbridge/amd/agesa/hudson/sata.c index bc1cd92d97..7499370dc5 100644 --- a/src/southbridge/amd/agesa/hudson/sata.c +++ b/src/southbridge/amd/agesa/hudson/sata.c @@ -29,7 +29,35 @@ static void sata_init(struct device *dev) { -} +#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) + /************************************** + * Configure the SATA port multiplier * + **************************************/ + #define BYTE_TO_DWORD_OFFSET(x) (x/4) + #define AHCI_BASE_ADDRESS_REG 0x24 + #define MISC_CONTROL_REG 0x40 + #define UNLOCK_BIT (1<<0) + #define SATA_CAPABILITIES_REG 0xFC + #define CFG_CAP_SPM (1<<12) + + volatile u32 *ahci_ptr = + (u32*)(pci_read_config32(dev, AHCI_BASE_ADDRESS_REG) & 0xFFFFFF00); + u32 temp; + + /* unlock the write-protect */ + temp = pci_read_config32(dev, MISC_CONTROL_REG); + temp |= UNLOCK_BIT; + pci_write_config32(dev, MISC_CONTROL_REG, temp); + + /* set the SATA AHCI mode to allow port expanders */ + *(ahci_ptr + BYTE_TO_DWORD_OFFSET(SATA_CAPABILITIES_REG)) |= CFG_CAP_SPM; + + /* lock the write-protect */ + temp = pci_read_config32(dev, MISC_CONTROL_REG); + temp &= ~UNLOCK_BIT; + pci_write_config32(dev, MISC_CONTROL_REG, temp); +#endif +}; static struct pci_operations lops_pci = { /* .set_subsystem = pci_dev_set_subsystem, */ |