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-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h6
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h6
2 files changed, 6 insertions, 6 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
index 6038b13eff..35cc43bcbb 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h
@@ -2498,7 +2498,7 @@ typedef struct {
/** Offset 0x091C - Reserved
**/
- UINT8 Reserved45[36];
+ UINT8 Reserved45[44];
} FSP_M_CONFIG;
/** Fsp M UPD Configuration
@@ -2517,11 +2517,11 @@ typedef struct {
**/
FSP_M_CONFIG FspmConfig;
-/** Offset 0x0940
+/** Offset 0x0948
**/
UINT8 UnusedUpdSpace27[6];
-/** Offset 0x0946
+/** Offset 0x094E
**/
UINT16 UpdTerminator;
} FSPM_UPD;
diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h
index b7ef0008f9..276ac79c4c 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspsUpd.h
@@ -1058,10 +1058,10 @@ typedef struct {
UINT16 ITbtDmaLtr[2];
/** Offset 0x04E2 - Enable/Disable CrashLog
- Enable(Default): Enable CPU CrashLog, Disable: Disable CPU CrashLog
+ Deprecated. Move to PreMem
$EN_DIS
**/
- UINT8 CpuCrashLogEnable;
+ UINT8 DeprecatedCpuCrashLogEnable;
/** Offset 0x04E3 - Enable/Disable PTM
This policy will enable/disable Precision Time Measurement for TCSS PCIe Root Ports
@@ -2838,7 +2838,7 @@ typedef struct {
/** Offset 0x0B95 - Configuration for boot TDP selection
Deprecated. Move to premem.
**/
- UINT8 ConfigTdpLevel;
+ UINT8 DeprecatedConfigTdpLevel;
/** Offset 0x0B96 - Max P-State Ratio
Max P-State Ratio, Valid Range 0 to 0x7F