diff options
20 files changed, 25 insertions, 30 deletions
diff --git a/src/mainboard/google/brya/romstage.c b/src/mainboard/google/brya/romstage.c index a00cf32a83..2560840307 100644 --- a/src/mainboard/google/brya/romstage.c +++ b/src/mainboard/google/brya/romstage.c @@ -9,7 +9,6 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) { - FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; const struct mb_cfg *mem_config = variant_memory_params(); bool half_populated = variant_is_half_populated(); struct mem_spd spd_info; @@ -21,7 +20,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) const struct pad_config *pads; size_t pads_num; - memcfg_init(m_cfg, mem_config, &spd_info, half_populated, &dimms_changed); + memcfg_init(memupd, mem_config, &spd_info, half_populated, &dimms_changed); if (dimms_changed) { memupd->FspmArchUpd.NvsBufferPtr = 0; memupd->FspmArchUpd.BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; diff --git a/src/mainboard/google/deltaur/romstage.c b/src/mainboard/google/deltaur/romstage.c index c04f6fb1a9..f9d71a8388 100644 --- a/src/mainboard/google/deltaur/romstage.c +++ b/src/mainboard/google/deltaur/romstage.c @@ -5,6 +5,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { - FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; - variant_memory_init(mem_cfg); + variant_memory_init(mupd); } diff --git a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h index 7a4ed08f59..6804ef6b19 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/deltaur/variants/baseboard/include/baseboard/variants.h @@ -19,7 +19,7 @@ const struct pad_config *variant_override_gpio_table(size_t *num); const struct cros_gpio *variant_cros_gpios(size_t *num); const struct mb_cfg *variant_memory_params(void); -void variant_memory_init(FSP_M_CONFIG *mem_cfg); +void variant_memory_init(FSPM_UPD *mupd); /* SKU ID structure */ typedef struct { diff --git a/src/mainboard/google/deltaur/variants/deltan/memory.c b/src/mainboard/google/deltaur/variants/deltan/memory.c index caa99a9b01..37c21cc045 100644 --- a/src/mainboard/google/deltaur/variants/deltan/memory.c +++ b/src/mainboard/google/deltaur/variants/deltan/memory.c @@ -61,7 +61,7 @@ static const struct mb_cfg baseboard_memcfg = { .ect = false, /* Disable Early Command Training */ }; -void variant_memory_init(FSP_M_CONFIG *mem_cfg) +void variant_memory_init(FSPM_UPD *mupd) { const struct mem_spd spd_info = { .topo = MEM_TOPO_DIMM_MODULE, @@ -77,5 +77,5 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg) new_board_cfg_ddr4.ddr4_config.dq_pins_interleaved = gpio_get(MEMORY_INTERLEAVED); - memcfg_init(mem_cfg, &new_board_cfg_ddr4, &spd_info, half_populated); + memcfg_init(mupd, &new_board_cfg_ddr4, &spd_info, half_populated); } diff --git a/src/mainboard/google/deltaur/variants/deltaur/memory.c b/src/mainboard/google/deltaur/variants/deltaur/memory.c index f8506df54b..a2037a84cf 100644 --- a/src/mainboard/google/deltaur/variants/deltaur/memory.c +++ b/src/mainboard/google/deltaur/variants/deltaur/memory.c @@ -77,7 +77,7 @@ static int variant_memory_sku(void) return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); } -void variant_memory_init(FSP_M_CONFIG *mem_cfg) +void variant_memory_init(FSPM_UPD *mupd) { const struct mb_cfg *board_cfg = variant_memory_params(); const struct mem_spd spd_info = { @@ -85,5 +85,5 @@ void variant_memory_init(FSP_M_CONFIG *mem_cfg) .cbfs_index = variant_memory_sku(), }; const bool half_populated = false; - memcfg_init(mem_cfg, board_cfg, &spd_info, half_populated); + memcfg_init(mupd, board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 8cde5da88b..f9e507cdcc 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -13,7 +13,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { - FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; const struct mb_cfg *board_cfg = variant_memory_params(); const struct mem_spd spd_info = { .topo = MEM_TOPO_MEMORY_DOWN, @@ -21,7 +20,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; bool half_populated = gpio_get(GPIO_MEM_CH_SEL); - memcfg_init(mem_cfg, board_cfg, &spd_info, half_populated); + memcfg_init(mupd, board_cfg, &spd_info, half_populated); memcfg_variant_init(mupd); } diff --git a/src/mainboard/intel/adlrvp/romstage_fsp_params.c b/src/mainboard/intel/adlrvp/romstage_fsp_params.c index 5b5cc6b295..8a24529f49 100644 --- a/src/mainboard/intel/adlrvp/romstage_fsp_params.c +++ b/src/mainboard/intel/adlrvp/romstage_fsp_params.c @@ -73,7 +73,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) case ADL_P_DDR4_1: case ADL_P_DDR4_2: case ADL_P_DDR5_1: - memcfg_init(m_cfg, mem_config, &dimm_module_spd_info, half_populated, + memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated, &dimms_changed); break; case ADL_P_DDR5_2: @@ -84,7 +84,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) case ADL_M_LP4: case ADL_M_LP5: case ADL_N_LP5: - memcfg_init(m_cfg, mem_config, &memory_down_spd_info, half_populated, + memcfg_init(memupd, mem_config, &memory_down_spd_info, half_populated, &dimms_changed); break; default: diff --git a/src/mainboard/intel/shadowmountain/romstage.c b/src/mainboard/intel/shadowmountain/romstage.c index 0951936bdc..eb08d18eed 100644 --- a/src/mainboard/intel/shadowmountain/romstage.c +++ b/src/mainboard/intel/shadowmountain/romstage.c @@ -9,7 +9,6 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) { - FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; const struct mb_cfg *mem_config = variant_memory_params(); const bool half_populated = false; bool dimms_changed = false; @@ -19,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) .cbfs_index = variant_memory_sku(), }; - memcfg_init(m_cfg, mem_config, &lp5_spd_info, half_populated, &dimms_changed); + memcfg_init(memupd, mem_config, &lp5_spd_info, half_populated, &dimms_changed); } diff --git a/src/mainboard/intel/tglrvp/romstage_fsp_params.c b/src/mainboard/intel/tglrvp/romstage_fsp_params.c index 33415684ed..22859f62e6 100644 --- a/src/mainboard/intel/tglrvp/romstage_fsp_params.c +++ b/src/mainboard/intel/tglrvp/romstage_fsp_params.c @@ -40,8 +40,6 @@ static uintptr_t mainboard_get_spd_index(void) void mainboard_memory_init_params(FSPM_UPD *mupd) { - FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; - const struct mb_cfg *mem_config = variant_memory_params(); const struct mem_spd spd_info = { .topo = MEM_TOPO_MEMORY_DOWN, @@ -49,6 +47,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; bool half_populated = false; - memcfg_init(mem_cfg, mem_config, &spd_info, half_populated); + memcfg_init(mupd, mem_config, &spd_info, half_populated); } diff --git a/src/mainboard/prodrive/atlas/romstage_fsp_params.c b/src/mainboard/prodrive/atlas/romstage_fsp_params.c index 9728a99a4f..fae7100b31 100644 --- a/src/mainboard/prodrive/atlas/romstage_fsp_params.c +++ b/src/mainboard/prodrive/atlas/romstage_fsp_params.c @@ -29,7 +29,6 @@ static const struct mb_cfg ddr5_mem_config = { void mainboard_memory_init_params(FSPM_UPD *memupd) { - FSP_M_CONFIG *m_cfg = &memupd->FspmConfig; const struct mb_cfg *mem_config = &ddr5_mem_config; const bool half_populated = false; bool dimms_changed = false; @@ -48,5 +47,5 @@ void mainboard_memory_init_params(FSPM_UPD *memupd) }, }; - memcfg_init(m_cfg, mem_config, &dimm_module_spd_info, half_populated, &dimms_changed); + memcfg_init(memupd, mem_config, &dimm_module_spd_info, half_populated, &dimms_changed); } diff --git a/src/mainboard/starlabs/labtop/variants/tgl/romstage.c b/src/mainboard/starlabs/labtop/variants/tgl/romstage.c index 1d65c61ba5..fed6efc9e4 100644 --- a/src/mainboard/starlabs/labtop/variants/tgl/romstage.c +++ b/src/mainboard/starlabs/labtop/variants/tgl/romstage.c @@ -25,7 +25,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }, }; - memcfg_init(&mupd->FspmConfig, &mem_config, &ddr4_spd_info, half_populated); + memcfg_init(mupd, &mem_config, &ddr4_spd_info, half_populated); const uint8_t vtd = get_uint_option("vtd", 1); mupd->FspmConfig.VtdDisable = !vtd; diff --git a/src/mainboard/system76/darp7/romstage.c b/src/mainboard/system76/darp7/romstage.c index a72b647d37..eb4fd3974b 100644 --- a/src/mainboard/system76/darp7/romstage.c +++ b/src/mainboard/system76/darp7/romstage.c @@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/galp5/romstage.c b/src/mainboard/system76/galp5/romstage.c index a72b647d37..eb4fd3974b 100644 --- a/src/mainboard/system76/galp5/romstage.c +++ b/src/mainboard/system76/galp5/romstage.c @@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/gaze16/romstage.c b/src/mainboard/system76/gaze16/romstage.c index f46e83c656..119c3f5d38 100644 --- a/src/mainboard/system76/gaze16/romstage.c +++ b/src/mainboard/system76/gaze16/romstage.c @@ -26,5 +26,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/lemp10/romstage.c b/src/mainboard/system76/lemp10/romstage.c index 6a916200b4..749efe668f 100644 --- a/src/mainboard/system76/lemp10/romstage.c +++ b/src/mainboard/system76/lemp10/romstage.c @@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/oryp8/romstage.c b/src/mainboard/system76/oryp8/romstage.c index affe6369cc..64cc844064 100644 --- a/src/mainboard/system76/oryp8/romstage.c +++ b/src/mainboard/system76/oryp8/romstage.c @@ -26,5 +26,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) // Enable M.2 PCIE 4.0 and PEG1 mupd->FspmConfig.CpuPcieRpEnableMask = 0x3; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/soc/intel/alderlake/include/soc/meminit.h b/src/soc/intel/alderlake/include/soc/meminit.h index 98482e33cc..6af0accb1b 100644 --- a/src/soc/intel/alderlake/include/soc/meminit.h +++ b/src/soc/intel/alderlake/include/soc/meminit.h @@ -109,7 +109,7 @@ struct mb_cfg { uint8_t LpDdrDqDqsReTraining; }; -void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *mb_cfg, +void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, const struct mem_spd *spd_info, bool half_populated, bool *dimms_changed); #endif /* _SOC_ALDERLAKE_MEMINIT_H_ */ diff --git a/src/soc/intel/alderlake/meminit.c b/src/soc/intel/alderlake/meminit.c index 8b54cb190e..31b3ae1cfa 100644 --- a/src/soc/intel/alderlake/meminit.c +++ b/src/soc/intel/alderlake/meminit.c @@ -235,11 +235,12 @@ static void ddr5_fill_dimm_module_info(FSP_M_CONFIG *mem_cfg, const struct mb_cf mem_init_dqs_upds(mem_cfg, NULL, mb_cfg, true); } -void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *mb_cfg, +void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, const struct mem_spd *spd_info, bool half_populated, bool *dimms_changed) { struct mem_channel_data data; bool dq_dqs_auto_detect = false; + FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig; mem_cfg->ECT = mb_cfg->ect; mem_cfg->UserBd = mb_cfg->UserBd; diff --git a/src/soc/intel/tigerlake/include/soc/meminit.h b/src/soc/intel/tigerlake/include/soc/meminit.h index 6b3086ccbd..b51c8ea221 100644 --- a/src/soc/intel/tigerlake/include/soc/meminit.h +++ b/src/soc/intel/tigerlake/include/soc/meminit.h @@ -111,7 +111,7 @@ struct mb_cfg { struct mem_ddr4_config ddr4_config; }; -void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *mb_cfg, +void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, const struct mem_spd *spd_info, bool half_populated); #endif /* _SOC_TIGERLAKE_MEMINIT_H_ */ diff --git a/src/soc/intel/tigerlake/meminit.c b/src/soc/intel/tigerlake/meminit.c index e8c7b6827b..d5ca9a93d6 100644 --- a/src/soc/intel/tigerlake/meminit.c +++ b/src/soc/intel/tigerlake/meminit.c @@ -147,11 +147,12 @@ static void mem_init_dqs_upds(FSP_M_CONFIG *mem_cfg, const struct mem_channel_da mem_init_dq_dqs_upds(dqs_upds, mb_cfg->dqs_map, upd_size, data); } -void memcfg_init(FSP_M_CONFIG *mem_cfg, const struct mb_cfg *mb_cfg, +void memcfg_init(FSPM_UPD *memupd, const struct mb_cfg *mb_cfg, const struct mem_spd *spd_info, bool half_populated) { struct mem_channel_data data; bool dimms_changed = false; + FSP_M_CONFIG *mem_cfg = &memupd->FspmConfig; if (mb_cfg->type >= ARRAY_SIZE(soc_mem_cfg)) die("Invalid memory type(%x)!\n", mb_cfg->type); |