diff options
| -rw-r--r-- | src/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 11 |
2 files changed, 1 insertions, 11 deletions
diff --git a/src/Kconfig b/src/Kconfig index 8078a76d6e..9c01687249 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -353,6 +353,7 @@ config CBFS_SIZE NORTHBRIDGE_INTEL_SANDYBRIDGE_NATIVE || \ NORTHBRIDGE_INTEL_NEHALEM || SOC_INTEL_BRASWELL || \ SOC_INTEL_BROADWELL + default 0x200000 if SOC_INTEL_SKYLAKE default ROM_SIZE help This is the part of the ROM actually managed by CBFS, located at the diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index d21fe3a5a8..92bae39567 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -70,17 +70,6 @@ config BOOTBLOCK_SOUTHBRIDGE_INIT string default "soc/intel/skylake/bootblock/pch.c" -config CBFS_SIZE - hex "Size of CBFS filesystem in ROM" - default 0x200000 - help - The firmware image has to store more than just coreboot, including: - - a firmware descriptor - - Intel Management Engine firmware - - MRC cache information - This option allows to limit the size of the CBFS portion in the - firmware image. - config CPU_ADDR_BITS int default 36 |