diff options
| -rw-r--r-- | src/arch/arm/eabi_compat.c | 4 | ||||
| -rw-r--r-- | src/arch/arm/libgcc/umoddi3.c | 2 | ||||
| -rw-r--r-- | src/arch/riscv/trap_handler.c | 4 | ||||
| -rw-r--r-- | src/arch/x86/cpu.c | 2 | ||||
| -rw-r--r-- | src/arch/x86/memset.c | 4 | ||||
| -rw-r--r-- | src/arch/x86/pirq_routing.c | 2 |
6 files changed, 9 insertions, 9 deletions
diff --git a/src/arch/arm/eabi_compat.c b/src/arch/arm/eabi_compat.c index cbc285c930..2a110d5ccf 100644 --- a/src/arch/arm/eabi_compat.c +++ b/src/arch/arm/eabi_compat.c @@ -26,11 +26,11 @@ void __aeabi_unwind_cpp_pr1(void) void __aeabi_memcpy(void *dest, const void *src, size_t n); void __aeabi_memcpy(void *dest, const void *src, size_t n) { - (void) memcpy(dest, src, n); + (void)memcpy(dest, src, n); } void __aeabi_memset(void *dest, size_t n, int c); void __aeabi_memset(void *dest, size_t n, int c) { - (void) memset(dest, c, n); + (void)memset(dest, c, n); } diff --git a/src/arch/arm/libgcc/umoddi3.c b/src/arch/arm/libgcc/umoddi3.c index 5d2ede7041..c84e9e43aa 100644 --- a/src/arch/arm/libgcc/umoddi3.c +++ b/src/arch/arm/libgcc/umoddi3.c @@ -4,6 +4,6 @@ uint64_t __umoddi3(uint64_t num, uint64_t den) { uint64_t v; - (void) __udivmoddi4(num, den, &v); + (void)__udivmoddi4(num, den, &v); return v; } diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index f940f63a5f..f5953d32ed 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -64,8 +64,8 @@ static void print_trap_information(const trapframe *tf) previous_mode, mprv? " (MPRV)":""); printk(BIOS_DEBUG, "Bad instruction pc: %p\n", (void *)tf->epc); printk(BIOS_DEBUG, "Bad address: %p\n", (void *)tf->badvaddr); - printk(BIOS_DEBUG, "Stored ra: %p\n", (void*) tf->gpr[1]); - printk(BIOS_DEBUG, "Stored sp: %p\n", (void*) tf->gpr[2]); + printk(BIOS_DEBUG, "Stored ra: %p\n", (void *)tf->gpr[1]); + printk(BIOS_DEBUG, "Stored sp: %p\n", (void *)tf->gpr[2]); } static void interrupt_handler(trapframe *tf) diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index 6a8ddefa14..9fc52330dc 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -59,7 +59,7 @@ static inline int test_cyrix_52div(void) : "cc"); /* AH is 0x02 on Cyrix after the divide.. */ - return (unsigned char) (test >> 8) == 0x02; + return (unsigned char)(test >> 8) == 0x02; } /* diff --git a/src/arch/x86/memset.c b/src/arch/x86/memset.c index fc09a9bd52..8a0165ba29 100644 --- a/src/arch/x86/memset.c +++ b/src/arch/x86/memset.c @@ -12,7 +12,7 @@ typedef uint32_t op_t; void *memset(void *dstpp, int c, size_t len) { int d0; - unsigned long int dstp = (unsigned long int) dstpp; + unsigned long int dstp = (unsigned long int)dstpp; #if (ENV_ROMSTAGE && CONFIG(ASAN_IN_ROMSTAGE)) || \ (ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE)) @@ -22,7 +22,7 @@ void *memset(void *dstpp, int c, size_t len) /* This explicit register allocation improves code very much indeed. */ register op_t x asm("ax"); - x = (unsigned char) c; + x = (unsigned char)c; /* Clear the direction flag, so filling will move forward. */ asm volatile("cld"); diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 362650dea9..0da057f4f1 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -17,7 +17,7 @@ static void check_pirq_routing_table(struct irq_routing_table *rt) if (sizeof(struct irq_routing_table) != rt->size) { printk(BIOS_WARNING, "Inconsistent Interrupt Routing Table size (0x%x/0x%x).\n", - (unsigned int) sizeof(struct irq_routing_table), + (unsigned int)sizeof(struct irq_routing_table), rt->size); rt->size = sizeof(struct irq_routing_table); } |