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-rw-r--r--src/mainboard/intel/adlrvp/devicetree.cb4
-rw-r--r--src/mainboard/intel/adlrvp/devicetree_m.cb4
-rw-r--r--src/mainboard/intel/adlrvp/devicetree_n.cb4
3 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb
index a4f85947a9..8847d88f93 100644
--- a/src/mainboard/intel/adlrvp/devicetree.cb
+++ b/src/mainboard/intel/adlrvp/devicetree.cb
@@ -168,6 +168,10 @@ chip soc/intel/alderlake
register "cnvi_bt_audio_offload" = "true"
+ # set EPP to 45%: 45 * 256/100 = 115 = 0x73
+ register "enable_energy_perf_pref" = "true"
+ register "energy_perf_pref_value" = "0x73"
+
# Intel Common SoC Config
register "common_soc_config" = "{
.i2c[0] = {
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb
index 4a41df61f7..deff4dc86d 100644
--- a/src/mainboard/intel/adlrvp/devicetree_m.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_m.cb
@@ -143,6 +143,10 @@ chip soc/intel/alderlake
register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
register "pch_hda_idisp_codec_enable" = "1"
+ # set EPP to 45%: 45 * 256/100 = 115 = 0x73
+ register "enable_energy_perf_pref" = "true"
+ register "energy_perf_pref_value" = "0x73"
+
# Intel Common SoC Config
register "common_soc_config" = "{
.gspi[1] = {
diff --git a/src/mainboard/intel/adlrvp/devicetree_n.cb b/src/mainboard/intel/adlrvp/devicetree_n.cb
index d38c010704..2b7eca6e5f 100644
--- a/src/mainboard/intel/adlrvp/devicetree_n.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_n.cb
@@ -127,6 +127,10 @@ chip soc/intel/alderlake
register "cnvi_bt_audio_offload" = "true"
+ # set EPP to 45%: 45 * 256/100 = 115 = 0x73
+ register "enable_energy_perf_pref" = "true"
+ register "energy_perf_pref_value" = "0x73"
+
# Intel Common SoC Config
register "common_soc_config" = "{
.i2c[0] = {