diff options
| -rw-r--r-- | src/soc/intel/skylake/finalize.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/pmc.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index 98f12a5b6c..0294a725b2 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -81,9 +81,9 @@ static void pch_finalize_script(struct device *dev) /* Disable XTAL shutdown qualification for low power idle. */ if (config->s0ix_enable) { - reg32 = read32(pmcbase + CIR31C); + reg32 = read32(pmcbase + CPPMVRIC); reg32 |= XTALSDQDIS; - write32(pmcbase + CIR31C, reg32); + write32(pmcbase + CPPMVRIC, reg32); } /* we should disable Heci1 based on the devicetree policy */ diff --git a/src/soc/intel/skylake/include/soc/pmc.h b/src/soc/intel/skylake/include/soc/pmc.h index f4995a2e86..68d9eb3d27 100644 --- a/src/soc/intel/skylake/include/soc/pmc.h +++ b/src/soc/intel/skylake/include/soc/pmc.h @@ -82,6 +82,6 @@ #define GPE0_DW_SHIFT(x) (4*(x)) #define GBLRST_CAUSE0 0x124 #define GBLRST_CAUSE1 0x128 -#define CIR31C 0x31c +#define CPPMVRIC 0x31c #define XTALSDQDIS (1 << 22) #endif |