diff options
| -rw-r--r-- | src/soc/intel/icelake/chip.h | 32 |
1 files changed, 0 insertions, 32 deletions
diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h index 956793acd5..cd0a9b03d8 100644 --- a/src/soc/intel/icelake/chip.h +++ b/src/soc/intel/icelake/chip.h @@ -53,24 +53,6 @@ struct soc_intel_icelake_config { /* TCC activation offset */ uint32_t tcc_offset; - uint64_t PlatformMemorySize; - uint8_t SmramMask; - uint8_t MrcFastBoot; - uint32_t TsegSize; - uint16_t MmioSize; - - /* DDR Frequency Limit. Maximum Memory Frequency Selections in Mhz. - * Options : 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933, 0(Auto) */ - uint16_t DdrFreqLimit; - - /* SAGV Low Frequency Selections in Mhz. - * Options : 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933, 0(Auto) */ - uint16_t FreqSaGvLow; - - /* SAGV Mid Frequency Selections in Mhz. - * Options : 1067, 1333, 1600, 1867, 2133, 2400, 2667, 2933, 0(Auto) */ - uint16_t FreqSaGvMid; - /* System Agent dynamic frequency support. Only effects ULX/ULT CPUs. * When enabled memory will be training at two different frequencies. * 0:Disabled, 1:FixedLow, 2:FixedMid, 3:FixedHigh, 4:Enabled */ @@ -88,7 +70,6 @@ struct soc_intel_icelake_config { /* USB related */ struct usb2_port_config usb2_ports[16]; struct usb3_port_config usb3_ports[10]; - uint8_t SsicPortEnable; /* Wake Enable Bitmap for USB2 ports */ uint16_t usb2_wake_enable_bitmap; /* Wake Enable Bitmap for USB3 ports */ @@ -144,27 +125,14 @@ struct soc_intel_icelake_config { /* Enable if SD Card Power Enable Signal is Active High */ uint8_t SdCardPowerEnableActiveHigh; - /* Integrated Sensor */ - uint8_t PchIshEnable; - /* Heci related */ uint8_t Heci3Enabled; /* Gfx related */ - uint8_t IgdDvmt50PreAlloc; uint8_t SkipExtGfxScan; - uint32_t GraphicsConfigPtr; uint8_t Device4Enable; - /* GPIO IRQ Select. The valid value is 14 or 15 */ - uint8_t GpioIrqRoute; - /* SCI IRQ Select. The valid value is 9, 10, 11, 20, 21, 22, 23 */ - uint8_t SciIrqSelect; - /* TCO IRQ Select. The valid value is 9, 10, 11, 20, 21, 22, 23 */ - uint8_t TcoIrqSelect; - uint8_t TcoIrqEnable; - /* HeciEnabled decides the state of Heci1 at end of boot * Setting to 0 (default) disables Heci1 and hides the device from OS */ uint8_t HeciEnabled; |