summaryrefslogtreecommitdiff
path: root/util
diff options
context:
space:
mode:
authorMario Scheithauer <mario.scheithauer@siemens.com>2022-01-27 09:33:20 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-03 13:49:34 +0000
commitcfb044322e0e712ae071453b2aed53a820d0d22f (patch)
tree62ae0b8a88e9b1105511022cb7a5a2185111cb03 /util
parent3c965dc3ac650b96097693d17cf1b96aec63b981 (diff)
mb/siemens/mc_ehl2: Disable PCIe RPs
With latest hardware revision only PCIe RP2 and RP7 are used on this mainboard. Change-Id: I7702c2b9058dde1c819cb1df8a68fd602f5997da Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61415 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'util')
0 files changed, 0 insertions, 0 deletions